FAN5056MV85 Datasheet, PDF (4/15 Pages) Fairchild Semiconductor – High Performance Programmable Synchronous DC-DC Controller for Multi-Voltage Platforms

FAN5056MV85
PRODUCT SPECIFICATION
Electrical Specifications (Continued)
(V_CCA = 5V, V_CCP = 12V, V_OUT = 1.425V, and T_A = +25°C using circuits in Figure 1, unless otherwise noted.)
The • denotes specifications which apply over the full operating temperature range.
Parameter
Total Output Variation, Transient²
Short Circuit Detect Current
Conditions
I_LOAD = 0.8A to I_max, V_VID = 1.425V
Min. Typ. Max. Units
• 1.335
1.515 V
• 45 50 60 µA
Efficiency
Output Driver Rise & Fall Time
Output Driver Deadtime
I_LOAD = 18A, V_VID = 1.425V
See Figure 3
See Figure 3
83
%
50
nsec
50
nsec
Duty Cycle
0
100 %
5V UVLO
12V UVLO
• 3.76 4 4.24 V
• 7.65 8.5 9.35 V
Adjustable Linear Regulator
Output Voltage
Over Current Trip Level
VCLK Linear Regulator
Output Voltage
Over Current Trip Level
VAGP Linear Regulator
Output Voltage
Output Voltage
Over Current Trip Level
Common Functions
I_LOAD ≤ 2A
I_LOAD ≤ 2A
I_LOAD ≤ 2A, TYPEDET = 0V
I_LOAD ≤ 2A, TYPEDET = OPEN
• 1.188 1.212 1.236 V
80
%V_O
• 2.375 2.5 2.625 V
80
%V_O
• 1.425 1.5 1.575 V
• 3.135 3.3 3.465 V
80
%V_O
Oscillator Frequency
PWRGD Threshold⁴ Switcher
PWRGD Delay Switcher
PWRGD Hysteresis Switcher
PWRGD Threshold⁴ Linear
Regulators
Logic HIGH [V_VID + 85mV]
Logic LOW [V_VID–155mV]
HIGH → LOW
All Outputs
• 255 300 345 kHz
• 88
• 80
112 %
120
6
µsec
25
mV
•
80
%V_out
Notes:
1. Steady State Voltage Regulation includes Initial Voltage Setpoint, Droop, Output Ripple and Output Temperature Drift and is
measured at the converter’s VFB sense point.
2. As measured at the converter’s VFB sense point. For motherboard applications, the PCB layout should exhibit no more than
0.5mΩ trace resistance between the converter’s output capacitors and the CPU. Remote sensing should be used for optimal
performance.
3. Using the VFB pin for remote sensing of the converter’s output at the load, and the appropriate droop, the converter will be
in compliance with Intel’s VRM 8.5 specification. If Intel specifications on maximum plane resistance from the converter’s
output capacitors to the CPU are met, the specifications at the capacitors will also be met.
4. PWRGD will be high only if BOTH the linears and the switcher conditions are met. PWRGD will be low if EITHER condition is met.
4
REV. 1.0.6 6/26/01