9034 Datasheet, PDF (4/7 Pages) Fairchild Semiconductor – Power MOSFET Avalanche Guideline

For practical purposes, an actual breakdown voltage in applications is chosen as 1.3 times the
rated low current breakdown voltage^[1]. Figure 5 is an example of this non-breakdown but
over the absolute maximum rating. The peak drain-source voltage is 668V but there is no
breakdown yet.
Even though the abnormal voltage spike did not cause a device breakdown, the junction tem-
perature of the Power MOSFET should be kept below the specified maximum junction temper-
ature to ensure reliability. The steady state junction temperature can be expressed as
T_J = P_DR_ΘJC + T_C
(1)
where
T_J: junction temperature
T_C: case temperature
P_D: power dissipated in the junction
R_ΘJC: steady state thermal resistance from junction to case
In many applications, however, the power dissipated in the Power MOSFET is pulsed rather
than DC. When a power pulse is applied to the device, the peak junction temperature varies
depending on peak power and pulse width. Thermal resistance at a given time is called tran-
sient thermal resistance and is expressed as
Z_ΘJC(t) = r(t) × R_ΘJC
(2)
where r(t) is a time dependent factor regarding thermal capacity. For very short pulses, r(t) is
quite small, but for long pulses it is nearly 1 and transient thermal resistance approaches the
steady state thermal resistance. Most Fairchild Power MOSFET datasheets have a graph
similar to that of Figure 6.
D=0.5
10^-1 0.2
0.1
0.05
0.02
10^{-2 0.01}
single pulse
※ Notes :
1. Z_{θ JC}(t) = 0.42 ℃/W Max.
2. Duty Factor, D=t₁/t₂
3. T_JM - T_C = P_DM * Z_{θ JC}(t)
10^-5
10^-4
10^-3
10^-2
10^-1
10⁰
10¹
t₁, Square Wave Pulse Duration [sec]
Figure 6. Transient Thermal Response, FQA11N90C
From this curve, the junction temperature can be obtained as follows:
T_J = P_DZ_ΘJC(t) + T_C
(3)
©2004 Fairchild Semiconductor Corporation
4
Rev. A, March 2004