GTLP17T616 Datasheet, PDF (3/10 Pages) Fairchild Semiconductor – 17-Bit LVTTL/GTLP Bus Transceiver with Buffered Clock

Functional Description
The GTLP17T616 is a 17 bit registered transceiver containing D-type flip-flop, latch and transparent modes of operation for
the data path and a GTLP translation of the CLKAB signal (CLKOUT). Data flow in each direction is controlled by the clock
enables (CEAB and CEBA), latch enables (LEAB and LEBA), clock (CLKAB and CLKBA) and output enables (OEAB and
OEBA). The clock enables (CEAB and CEBA) enable all 17 bits. The output enables (OEAB and OEBA) control the 17 bits
of data and the CLKOUT/CLKIN buffered clock path. For A-to-B data flow, when CEAB is low, the device operates on the
LOW-to-HIGH transition of CLKAB for the flip-flop and on the HIGH-to-LOW transition of LEAB for the latch path. That is, if
CEAB is LOW and LEAB is LOW the A data is latched regardless as to the state of CLKAB (HIGH or LOW) and if LEAB is
HIGH the device is in transparent mode. When OEAB is LOW the outputs are active. When OEAB is HIGH the outputs are
high impedance. The data flow of B-to-A is similar except that CEAB, OEBA, LEBA and CLKBA are used.
Logic Diagram
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