FIN1049 Datasheet, PDF (3/10 Pages) Fairchild Semiconductor – LVDS Dual Line Driver with Dual Line Receiver

Absolute Maximum Ratings(Note 2)
Supply Voltage (V_CC)
LVDS DC Input Voltage (V_IN)
LVDS DC Output Voltage (V_OUT)
Driver Short Circuit Current (I_OSD)
Storage Temperature Range (T_STG)
Max Junction Temperature (T_J)
Lead Temperature (T_L)
(Soldering, 10 seconds)
ESD (Human Body Model)
ESD (Machine Model)
−0.5V to +4.6V
−0.5V to +4.6V
−0.5V to +4.6V
Continuous 10mA
−65°C to +150°C
150°C
260°C
>7000V
>250V
Recommended Operating
Conditions
Supply Voltage (V_CC)
Magnitude of Differential Voltage
(|V_ID|)
Operating Temperature (T_A)
3.0V to 3.6V
100mV to V_CC
−40°C to +85°C
Note 2: The “Absolute Maximum Ratings”: are those values beyond which
damage to the device may occur. The databook specifications should be
met, without exception, to ensure that the system design is reliable over its
power supply, temperature and output/input loading variables. Fairchild
does not recommend operation of circuits outside databook specification.
DC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Symbol
Parameter
Test Conditions
Min
Typ
Max
(Note 3)
V_TH
V_TL
V_IC
I_IN
V_IH
V_IL
I_IN
V_IK
V_OD
∆V_OD
LVDS Input DC Specifications (R_IN1+, R_IN1−, R_IN2+, R_IN2−) See Figure 1 and Table 1
Differential Input Threshold HIGH
Differential Input Threshold LOW
VCM = 1.2V, 0.05V, 2.35V
0.0
−100
0.0
Common Mode Voltage Range
V_ID = 100mV, V_CC = 3.3V
V_ID/2
Input Current
V_CC = 0V or 3.6V, V_IN = 0V or 2.8V
CMOS/ LVTTL Input DC Specifications (EN, ENb, D_IN1, D_IN2)
Input High Voltage (LVTTL)
2.0
Input Low Voltage (LVTTL)
GND
Input Current
(EN, ENb, D_IN1, D_IN2, R_INx+, and
R_INx−)
V_IN = 0V or V_CC
Input Clamp Voltage
V_IK = −18mA
−1.5
LVDS Output DC Specifications (D_OUT1+, D_OUT1−, D_OUT2+, D_OUT2−)
Output Differential Voltage
250
−0.7
350
V_OD Magnitude Change from
Differential LOW-to-HIGH
R_L = 100Ω,
Driver Enabled,
35.0
V_CC − (V_ID/2)
±20.0
V_CC
0.8
±20.0
450
35.0
V_OS
∆V_OS
Offset Voltage
Offset Magnitude Change from
Differential LOW-to-HIGH
See Figure 2
1.125
1.25
1.375
25.0
I_OS
I_OSD
Short Circuit Output Current
D_OUT+ = 0V & D_OUT− = 0V, Driver Enabled
V_OD = 0V, Driver Enabled
−9.0
−9.0
I_OFF
Power-Off Input or Output Current
V_CC = 0V, V_OUT = 0V or V_CC
±20.0
I_OZD
Disabled Output Leakage Current
Driver Disabled, D_OUT+ = 0V or V_CC
or D_OUT− = 0V or V_CC
±10.0
CMOS/LVTTL Output DC Specifications (R_OUT1, R_OUT2)
V_OH
Output High Voltage
I_OH = −2mA, V_ID = 200mV
2.7
V_OL
Output Low Voltage
I_OL = 2mA, V_ID = 200mV
0.250
I_OZ
Disabled Output Leakage Current
Driver Disabled, R_OUTn = 0V or V_CC
±10.0
I_CC
Power Supply Current (Note 4)
Drivers Enabled, Any Valid Input Condition
25.0
I_CCZ
Power Supply Current
Drivers Disabled
10.0
C_IND
Input Capacitance
LVDS Input
3.0
C_OUT
Output Capacitance
LVDS Output
4.0
C_INT
Input Capacitance
LVTTL Input
3.5
Note 3: All typical values are at T_A = 25°C and with V_CC = 3.3V.
Note 4: Both driver and receiver inputs are static. All LVDS outputs have 100Ω load. None of the outputs have any lumped capacitive load.
Units
mV
mV
V
mA
V
V
µA
V
mV
mV
V
mV
mA
mA
µA
µA
V
V
µA
mA
mA
pF
pF
pF
3
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