74F569 Datasheet, PDF (3/9 Pages) NXP Semiconductors – 4-bit bidirectional binary synchronous counter 3-State

CC Truth Table
Inputs
Output
SR PE CEP CET TC CP CC
(Note 1)
LXXX
X
X
H
X L XX
X
X
H
XXHX
X
X
H
XXXH
X
X
H
XXXX
HHL L
^H
X
H
L
^{H = HIGH Voltage Level}
L = LOW Voltage Level
X = Immaterial
= HIGH-to-LOW-to-HIGH Clock Transition
Note 1: TC is generated internally
Mode Select Table
Inputs
Operating
MR SR PE CEP CET U/D
Mode
L X X X X X Asynchronous Reset
H L X X X X Synchronous Reset
H H L X X X Parallel Load
H H H H X X Hold
H H H X H X Hold
H H H L L H Count Up
H H H L L L Count Down
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
FIGURE 1. Multistage Counter with Ripple Carry
State Diagram
FIGURE 2. Multistage Counter with Lookahead Carry
3
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