74F569 Datasheet, PDF (1/9 Pages) NXP Semiconductors – 4-bit bidirectional binary synchronous counter 3-State

April 1988
Revised August 1999
74F569
4-Bit Bidirectional Counter with 3-STATE Outputs
General Description
The 74F569 is a fully synchronous, reversible counter with
3-STATE outputs. The 74F569 is a binary counter, featur-
ing preset capability for programmable operation, carry loo-
kahead for easy cascading, and a U/D input to control the
direction of counting. For maximum flexibility there are both
synchronous and master asynchronous reset inputs as well
as both Clocked Carry (CC) and Terminal Count (TC) out-
puts. All state changes except Master Reset are initiated by
the rising edge of the clock. A HIGH signal on the Output
Enable (OE) input forces the output buffers into the high
impedance state but does not prevent counting, resetting
or parallel loading.
Features
s Synchronous counting and loading
s Lookahead carry capability for easy cascading
s Preset capability for programmable operation
s 3-STATE outputs for bus organized systems
Ordering Code:
Order Number Package Number
Package Description
74F569SC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74F569SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F569PC
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
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