HP4410DY Datasheet, PDF (2/6 Pages) Fairchild Semiconductor – 10A, 30V, 0.0135 Ohm, Single N-Channel, Logic Level Power MOSFET

HP4410DY
Absolute Maximum Ratings T_A = 25^oC, Unless Otherwise Specified
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V_DSS
Drain to Gate Voltage (R_GS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V_DGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V_GS
Drain Current
Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I_D
Pulsed Drain Current (10µs Pulse Width) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I_DM
Power Dissipation . . .
Derate Above 25^oC
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P_D
...
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T_J, T_STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T_L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T_pkg
HP4410DY
30
30
±16
10
50
2.5
0.02
-55 to 150
300
260
UNITS
V
V
V
A
A
W
W/^oC
o_C
o_C
o_C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. T_A = 25^oC to 125^oC.
Electrical Specifications T_A = 25^oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
Drain to Source Breakdown Voltage
Gate to Source Threshold Voltage
BV _DSS
V_GS(TH)
I_D = 250µA, V_GS = 0V
V_GS = V_DS, I_D = 250µA (Figure 9)
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Drain to Source On Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Input Capacitance
Output Capacitance
I_DSS
I_GSS
r_DS(ON)
t_d(ON)
t_r
t_d(OFF)
t_f
Q_g(TOT)
Q_gs
Q_gd
C_ISS
C_OSS
V_DS = 30V, V_GS = 0V
V_DS = 30V, V_GS = 0V, T_A = 55^oC
V_GS = ±16V
I_D = 8A, V_GS = 4.5V (Figures 6, 8)
I_D = 10A, V_GS = 10V (Figures 6, 8)
V_DD = 25V, I_D ≅ 1A,
R_L = 25Ω, V_GEN = 10V,
R_GS = 6Ω
V_DS = 15V, V_GS = 10V, I_D ≅ 10A
V_DS = 25V, V_GS = 0V, f = 1MHz
(Figure 4)
Reverse Transfer Capacitance
Thermal Resistance Junction to Ambient
C _RSS
R _{θ JA}
Pulse Width < 10s (Figure 11)
Device Mounted on FR-4 Material
Source to Drain Diode Specifications
PARAMETER
Source to Drain Diode Voltage
Reverse Recovery Time
SYMBOL
TEST CONDITIONS
V _SD
I_SD = 2.3A (Figure 7)
t_rr
I_SD = 2.3A, dI_SD/dt = 100A/µs
MIN
TYP
MAX UNITS
30
-
-
V
1
-
-
V
-
-
1
µA
-
-
25
µA
-
-
100
nA
-
0.015 0.020
Ω
-
0.011 0.0135
Ω
-
15
30
ns
-
9
20
ns
-
70
100
ns
-
20
80
ns
-
35
60
nC
-
7.5
-
nC
-
5.8
-
nC
-
1600
-
pF
-
685
-
pF
-
115
-
pF
-
-
50
o_C/W
MIN
TYP
MAX UNITS
-
0.75
1.1
V
-
50
80
ns
©2001 Fairchild Semiconductor Corporation
HP4410DY Rev. B