GTLP10B320 Datasheet, PDF(2/12 Page) Fairchild Semiconductor – 10-Bit LVTTL/GTLP Transceiver with Split LVTTL Port and Feedback Path

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GTLP10B320 Datasheet, PDF (2/12 Pages) Fairchild Semiconductor – 10-Bit LVTTL/GTLP Transceiver with Split LVTTL Port and Feedback Path

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Pin Descriptions

Pin Names

Description

OEB, OEC

B Port, C Port Output Enable

respectively (Active LOW)

VCC, GND, VREF Device Supplies

LECLKAB,

LECLKBC

A-to-B, B-to-C Latch CLK respectively

(Transparent Active HIGH)

SEL

SAB, SBC

B0-B9

A0-A9

C0-C9

VERC

Selects Internal Feedback Path

Selects Register or Latch/Transparent

Path for A-to-B and B-to-C respectively

B Port GTLP I/O

A Port LVTTL Inputs

C Port LVTTL Outputs

Edge Rate Control Pin

(GND = Slow Edge Rate)

(VCC = Fast Edge Rate)

Connection Diagram

Functional Description

The GTLP10B320 is a 10-bit Universal driver and receiver

containing D-Type flip-flop, latch, and transparent modes of

operation for the data paths. In addition there is an internal

feedback path that can be used for diagnostic monitoring or

caching schemes. Data flow in each direction is controlled

by the clock signals (LECLKAB and LECLKBC) and output

enables (OEB and OEC). The internal feedback path is

controlled by the SEL pin and allows data transfer from

Port A to Port C without requiring data to be output to the

backplane. The internal feedback path is selected with SEL

LOW and the B Port pin is selected with SEL HIGH. The

data paths can also be configured for latch/transparent or

pins. Data polarity is non-inverting with the GTLP outputs

enabled via the OEB pin and the LVTTL outputs being

enabled via the OEC pin.

For A-to-B data flow the device is configured into a latch/

transparent or register mode by pin SAB. If SAB is LOW

then the register mode is selected and the device operates

on the LOW-to-HIGH transition of LECLKAB. If SAB is

HIGH then the latch/transparent configuration is selected

and a HIGH-to-LOW transition of LECLKAB stores data in

the latch. If LECLKAB is HIGH the device is in transparent

mode. When OEB is LOW the outputs are active and when

OEB is HIGH the outputs are high impedance.

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