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FAN5109 Datasheet, PDF (2/13 Pages) Fairchild Semiconductor – Dual Bootstrapped 12V MOSFET Driver
Typical Application
FAN5109
PWM 2
OD
3
OVERLAP
PROTECTION
CIRCUIT
VCC
VCC
4
BOOT
1
Q1
8 HDRV
7 SW
Q2
5 LDRV
PGND
6
12V
D1
CVCC
CBOOT
L1
VOUT
COUT
Figure 1. Typical Application
Pin Configuration
BOOT
PWM
OD
VCC
1
8
2
7
FAN5109
3
6
4
5
HDRV
SW
PGND
LDRV
Figure 2. 8-Pin SOIC Package
Pin Definitions
Pin #
1
2
3
4
5
6
7
8
Pin Name
BOOT
PWM
OD
VCC
LDRV
PGND
SW
HDRV
Pin Function Description
Bootstrap Supply Input. Provides voltage supply to the high-side MOSFET driver.
Connect to bootstrap capacitor and diode.
PWM Signal Input. Accepts a logic-level PWM signal from the controller.
Output Disable. When low, this pin disables FET switching (HDRV and LDRV are
held low).
Power Input. +12V bias power. Bypass with a 1µF ceramic capacitor.
Low Side Gate Drive Output. Connect to the gate of the low-side power MOSFET(s).
Power Ground. Connect directly to the source of low-side MOSFET(s) and CVCC.
Switch Node Input. Connect as shown in Figure 1. SW provides return for the high-side
bootstrapped driver and acts as a sense point for the adaptive shoot-thru protection.
High Side Gate Drive Output. Connect to the gate of the high-side power MOSFET(s).
2
FAN5109 Rev. 1.0.4
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