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FAN3223_12 Datasheet, PDF (2/24 Pages) Fairchild Semiconductor – Dual 4A High-Speed, Low-Side Gate Drivers
Ordering Information
Part Number
Logic
Input
Threshold
Package
Eco
Status
Packing Quantity
Method per Reel
FAN3223CMX_F085 Dual Inverting Channels +
FAN3223TMX_F085 Dual Enable
FAN3224CMX_F085 Dual Non-Inverting Channels
FAN3224TMX_F085 + Dual Enable
FAN3225CMX_F085 Dual Channels of Two-Input /
FAN3225TMX_F085 One-Output Drivers
CMOS
TTL
CMOS
TTL
CMOS
TTL
SOIC-8
SOIC-8
SOIC-8
SOIC-8
SOIC-8
SOIC-8
RoHS
RoHS
RoHS
RoHS
RoHS
RoHS
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
2,500
2,500
2,500
2,500
2,500
2,500
For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
Package Outline
Figure 2. SOIC-8 (Top View)
Thermal Characteristics(1)
Package
8-Pin Small Outline Integrated Circuit (SOIC)
ΘJL(2)
38
ΘJT(3)
29
ΘJA(4)
87
ΨJB(5)
41
ΨJT(6)
2.3
Units
°C/W
Notes:
1. Estimates derived from thermal simulation; actual values depend on the application.
2. Theta_JL (ΘJL): Thermal resistance between the semiconductor junction and the bottom surface of all the leads (including any
thermal pad) that are typically soldered to a PCB.
3. Theta_JT (ΘJT): Thermal resistance between the semiconductor junction and the top surface of the package, assuming it is
held at a uniform temperature by a top-side heatsink.
4. Theta_JA (ΘJA): Thermal resistance between junction and ambient, dependent on the PCB design, heat sinking, and airflow.
The value given is for natural convection with no heatsink using a 2S2P board, as specified in JEDEC standards JESD51-2,
JESD51-5, and JESD51-7, as appropriate.
5. Psi_JB (ΨJB): Thermal characterization parameter providing correlation between semiconductor junction temperature and an
application circuit board reference point for the thermal environment defined in Note 4. For the SOIC-8 package, the board
reference is defined as the PCB copper adjacent to pin 6.
6. Psi_JT (ΨJT): Thermal characterization parameter providing correlation between the semiconductor junction temperature and
the center of the top of the package for the thermal environment defined in Note 4.
© 2012 Fairchild Semiconductor Corporation
FAN3223 / FAN3224 / FAN3225_F085 • Rev. 1.0.0
2
www.fairchildsemi.com