FAN3111 Datasheet, PDF (2/18 Pages) Fairchild Semiconductor – Single 1A High-Speed, Low-Side Gate Driver

Ordering Information
Part Number
FAN3111CSX
FAN3111ESX
Input
Threshold
Package
CMOS
External
5-Pin SOT23
5-Pin SOT23
Eco Status
RoHS
RoHS
Packing Method
Tape & Reel
Tape & Reel
Quantity per
Reel
3,000
3,000
For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
Thermal Characteristics⁽¹⁾
5-Pin SOT23
Package
Θ_JL(2)
58
Θ_JT(3)
102
Θ_JA(4)
161
Ψ_JB(5)
53
Ψ_JT(6) Units
6
°C/W
Notes:
1. Estimates derived from thermal simulation; actual values depend on the application.
2. Theta_JL (ΘJL): Thermal resistance between the semiconductor junction and the bottom surface of all the leads
(including any thermal pad) that are typically soldered to a PCB.
3. Theta_JT (ΘJT): Thermal resistance between the semiconductor junction and the top surface of the package,
assuming it is held at a uniform temperature by a top-side heatsink.
4. Theta_JA (ΘJA): Thermal resistance between junction and ambient, dependent on the PCB design, heat sinking,
and airflow. The value given is for natural convection with no heatsink, as specified in JEDEC standards
JESD51-2, JESD51-5, and JESD51-7, as appropriate.
5. Psi_JB (ΨJB): Thermal characterization parameter providing correlation between semiconductor junction
temperature and an application circuit board reference point for the thermal environment defined in Note 4. For
the MLP-8 package, the board reference is defined as the PCB copper connected to the thermal pad and
protruding from either end of the package. For the SOIC-8 package, the board reference is defined as the PCB
copper adjacent to pin 6.
6. Psi_JT (ΨJT): Thermal characterization parameter providing correlation between the semiconductor junction
temperature and the center of the top of the package for the thermal environment defined in Note 4.
Pin Definitions
Pin # Name Description
1
VDD Supply Voltage. Provides power to the IC.
2
GND Ground. Common ground reference for input and output circuits.
3
IN+ Non-Inverting Input. Connect to VDD to enable output.
IN– FAN3111C Inverting Input. Connect to GND to enable output.
4
XREF FAN3111E External Reference Voltage. Reference for input thresholds, 2V to 5V.
5
OUT Gate Drive Output. Held low unless required inputs are present.
Output Logic with Dual-Input Configuration
IN+
0⁽⁷⁾
0⁽⁷⁾
IN−
0
1⁽⁷⁾
1
0
1
1⁽⁷⁾
Note:
7. Default input signal if no external connection is made.
OUT
0
0
1
0
© 2008 Fairchild Semiconductor Corporation
FAN3111 • Rev. 1.0.1
2
www.fairchildsemi.com