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FAN3111 Datasheet, PDF (14/18 Pages) Fairchild Semiconductor – Single 1A High-Speed, Low-Side Gate Driver
Truth Table of Logic Operation
The FAN3111 truth table indicates the operational
states using the dual-input configuration. In a non-
inverting driver configuration, the IN- pin should be a
logic low signal. If the IN- pin is connected to logic high,
a disable function is realized, and the driver output
remains low regardless of the state of the IN+ pin.
Table 1. FAN3111 Truth Table
IN+
IN-
OUT
0
0
0
0
1
0
1
0
1
1
1
0
In the non-inverting driver configuration in Figure 41,
the IN- pin is tied to ground and the input signal (PWM)
is applied to the IN+ pin. The IN- pin can be connected
to logic high to disable the driver and the output
remains low, regardless of the state of the IN+ pin.
VDD
PWM
IN+
IN- FAN3111
OUT
GND
Figure 41. Dual-Input Driver Enabled, Non-
Inverting Configuration
In the inverting driver application shown in Figure 42, the
IN+ pin is tied high. Pulling the IN+ pin to GND forces the
output low, regardless of the state of the IN- pin.
VDD
Thermal Guidelines
Gate drivers used to switch MOSFETs and IGBTs at
high frequencies can dissipate significant amounts of
power. It is important to determine the driver power
dissipation and the resulting junction temperature in the
application to ensure that the part is operating within
acceptable temperature limits.
The total power dissipation in a gate driver is the sum of
three components; PGATE, PQUIESCENT, and PDYNAMIC:
Ptotal = Pgate + PDynamic
(1)
Gate Driving Loss: The most significant power loss
results from supplying gate current (charge per unit
time) to switch the load MOSFET on and off at the
switching frequency. The power dissipation that results
from driving a MOSFET at a specified gate-source
voltage, VGS, with gate charge, QG, at switching
frequency, fSW, is determined by:
PGATE = QG • VGS • fsw
(2)
Dynamic Pre-drive / Shoot-through Current: A power loss
resulting from internal current consumption under
dynamic operating conditions, including pin pull-up /
pull-down resistors, can be obtained using the graphs in
Figure 11 and Figure 12 in Typical Performance
Characteristics to determine the current IDYNAMIC drawn
from VDD under actual operating conditions:
PDYNAMIC = IDYNAMIC • VDD
(3)
Once the power dissipated in the driver is determined,
the driver junction temperature rise with respect to the
device lead can be evaluated using thermal equation:
TJ = PTOTAL ΘJL + TC
(4)
where:
TJ = driver junction temperature;
θJL = thermal resistance from junction to lead; and
TL = lead temperature of device in application.
The power dissipated in a gate-drive circuit is
independent of the drive-circuit resistance and is split
proportionately among the resistances present in the
driver, any discrete series resistor present, and the gate
resistance internal to the power switching MOSFET.
Power dissipated in the driver may be estimated using
the following equation:
PWM
IN+
FAN3111
IN-
GND
OUT
Figure 42. Dual-Input Driver Enabled, Inverting
Configuration
PPKG
=
PTOTAL
⎜⎛
⎜⎝
ROUT,Driver
ROUT,DRIVER + REXT +
RGATE,FET
⎟⎞
⎟⎠
(5)
where:
PPKG = power dissipated in the driver package;
ROUT,DRIVER = estimated driver impedance derived from
IOUT vs. VOUT waveforms;
REXT = external series resistance connected between
the driver output and the gate of the MOSFET; and
RGATE,FET = resistance internal to the load MOSFET gate
and source connections.
© 2008 Fairchild Semiconductor Corporation
FAN3111 • Rev. 1.0.1
14
www.fairchildsemi.com