FAN5092MTC Datasheet, PDF (18/20 Pages) Fairchild Semiconductor – High Current System Voltage Buck Converter

FAN5092
PRODUCT SPECIFICATION
PCB Layout Guidelines
• Placement of the MOSFETs relative to the FAN5092 is
critical. Place the MOSFETs such that the trace length of
the HIDRV and LODRV pins of the FAN5092 to the FET
gates is minimized. A long lead length on these pins will
cause high amounts of ringing due to the inductance of the
trace and the gate capacitance of the FET. This noise
radiates throughout the board, and, because it is switching
at such a high voltage and frequency, it is very difficult to
suppress.
• In general, all of the noisy switching lines should be kept
away from the quiet analog section of the FAN5092. That
is, traces that connect to pins 9-20 (LDRV, HDRV, GND
and BOOT) should be kept far away from the traces that
connect to pins 1 through 8, and pins 21-28.
• Place the 0.1µF decoupling capacitors as close to the
FAN5092 pins as possible. Extra lead length on these
reduces their ability to suppress noise.
• Each power and ground pin should have its own via to the
appropriate plane. This helps provide isolation between
pins.
• Place the MOSFETs, inductor, and Schottky of a given
slice as close together as possible for the same reasons as
in the first bullet above. Place the input bulk capacitors as
close to the drains of the high side MOSFETs as possible.
In addition, placement of a 0.1µF decoupling cap right on
the drain of each high side MOSFET helps to suppress
some of the high frequency switching noise on the input
of the DC-DC converter.
• Place the output bulk capacitors as close to the CPU as
possible to optimize their ability to supply instantaneous
current to the load in the event of a current transient.
Additional space between the output capacitors and the
CPU will allow the parasitic resistance of the board traces
to degrade the DC-DC converter’s performance under
severe load transient conditions, causing higher voltage
deviation. For more detailed information regarding
capacitor placement, refer to Application Bulletin AB-5.
• A PC Board Layout Checklist is available from Fairchild
Applications. Ask for Application Bulletin AB-11.
PC Motherboard Sample Layout and Gerber File
A reference design for motherboard implementation of the
FAN5092 along with the PCAD layout Gerber file and silk
screen can be obtained through your local Fairchild represen-
tative.
FAN5092 Evaluation Board
Fairchild provides an evaluation board to verify the system
level performance of the FAN5092. It serves as a guide to
performance expectations when using the supplied external
components and PCB layout. Please contact your local
Fairchild representative for an evaluation board.
Additional Information
For additional information contact your local Fairchild
representative.
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REV. 1.0.7 6/20/02