FAN3226_11 Datasheet, PDF (18/25 Pages) Fairchild Semiconductor – Dual 2A High-Speed, Low-Side Gate Drivers

V_DD Bypass Capacitor Guidelines
To enable this IC to turn a device on quickly, a local
high-frequency bypass capacitor C_BYP with low ESR and
ESL should be connected between the VDD and GND
pins with minimal trace length. This capacitor is in
addition to bulk electrolytic capacitance of 10µF to 47µF
commonly found on driver and controller bias circuits.
A typical criterion for choosing the value of C_BYP is to
keep the ripple voltage on the V_DD supply to ≤5%. This
is often achieved with a value ≥20 times the equivalent
load capacitance C_EQV, defined here as Q_GATE/V_DD.
Ceramic capacitors of 0.1µF to 1µF or larger are
common choices, as are dielectrics, such as X5R and
X7R with good temperature characteristics and high
pulse current capability.
If circuit noise affects normal operation, the value of
C_BYP may be increased to 50-100 times the C_EQV, or
C_BYP may be split into two capacitors. One should be a
larger value, based on equivalent load capacitance, and
the other a smaller value, such as 1-10nF mounted
closest to the VDD and GND pins to carry the higher
frequency components of the current pulses. The
bypass capacitor must provide the pulsed current from
both of the driver channels and, if the drivers are
switching simultaneously, the combined peak current
sourced from the C_BYP would be twice as large as when
a single channel is switching.
 The FAN322x is compatible with many other
industry-standard drivers. In single input parts with
enable pins, there is an internal 100k resistor tied
to V_DD to enable the driver by default; this should be
considered in the PCB layout.
 The turn-on and turn-off current paths should be
minimized, as discussed in the following section.
Figure 49 shows the pulsed gate drive current path
when the gate driver is supplying gate charge to turn the
MOSFET on. The current is supplied from the local
bypass capacitor, C_BYP, and flows through the driver to
the MOSFET gate and to ground. To reach the high
peak currents possible, the resistance and inductance in
the path should be minimized. The localized C_BYP acts
to contain the high peak current pulses within this driver-
MOSFET circuit, preventing them from disturbing the
sensitive analog circuitry in the PWM controller.
V_DD
V_DS
C_BYP
FAN322x
Layout and Connection Guidelines
The FAN3226-26 family of gate drivers incorporates
fast-reacting input circuits, short propagation delays,
and powerful output stages capable of delivering current
peaks over 2A to facilitate voltage transition times from
under 10ns to over 150ns. The following layout and
connection guidelines are strongly recommended:
PWM
Figure 49. Current Path for MOSFET Turn-on
 Keep high-current output and power ground paths
separate logic and enable input signals and signal
ground paths. This is especially critical when
dealing with TTL-level logic thresholds at driver
inputs and enable pins.
 Keep the driver as close to the load as possible to
minimize the length of high-current traces. This
reduces the series inductance to improve high-
speed switching, while reducing the loop area that
can radiate EMI to the driver inputs and
surrounding circuitry.
 If the inputs to a channel are not externally
connected, the internal 100k resistors indicated
on block diagrams command a low output. In noisy
environments, it may be necessary to tie inputs of
an unused channel to VDD or GND using short
traces to prevent noise from causing spurious
output switching.
Figure 50 shows the current path when the gate driver
turns the MOSFET off. Ideally, the driver shunts the
current directly to the source of the MOSFET in a small
circuit loop. For fast turn-off times, the resistance and
inductance in this path should be minimized.
V_DD
V_DS
C_BYP
FAN322x
PWM
 Many high-speed power circuits can be susceptible
to noise injected from their own output or other
external sources, possibly causing output re-
triggering. These effects can be obvious if the
circuit is tested in breadboard or non-optimal circuit
layouts with long input, enable, or output leads. For
best results, make connections to all pins as short
and direct as possible.
Figure 50. Current Path for MOSFET Turn-off
© 2007 Fairchild Semiconductor Corporation
FAN3226 / FAN3227 / FAN3228 / FAN3229 • Rev. 1.0.7
18
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