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FAN7389 Datasheet, PDF (17/18 Pages) Fairchild Semiconductor – 3-Phase Half-Bridge Gate-Drive IC
Package Dimensions
24
B
15.40±0.20
13.970
7.50±0.10
10.325
A
13
14.52
10.95
9.2
1
PIN ONE
INDICATOR
0.51
0.35
0.25 M C B A
12
1.27
1.75 TYP
1.27 TYP
0.55 TYP
LAND PATTERN RECOMMENDATION
2.65 MAX
(R0.10)
(R0.10)
8°
0°
0.40~1.27
(1.40)
0.20±0.10
0.75
0.25
X 45°
C
0.10 C
GAGE PLANE
0.25
SEATING PLANE
DETAIL A
SCALE: 2:1
SEE DETAIL A
0.33
0.20
SEATING PLANE
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO JEDEC
MS-013, ISSUE E, DATED SEPT 2005.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
D) LANDPATERN STANDARD: SOIC127P1030X265-24L
E) DRAWING FILENAME: MKT-M24BREV2
Figure 46.24-Lead Small Outline Integrated Circuit (24-Wide Body SOIC)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2010 Fairchild Semiconductor Corporation
FAN7389 • Rev. 1.0.0
17
www.fairchildsemi.com