FXMA2102 Datasheet, PDF (15/16 Pages) Fairchild Semiconductor – Dual Supply, 2-Bit Voltage Translator / Buffer / Repeater / Isolator for I2C Applications

Physical Dimensions
0.10 C
2X
1.40
AB
1.20
TOP VIEW
0.10 C
2X
0.725
0.40
1.45
1.25
0.45
(7X) 0.35
0.625
0.25
(8X)
RECOMMENDED
LAND PATTERN
0.05 C ^{0.55 MAX}
0.05 C
0.025
SEATING _C
PLANE
0.00
SIDE VIEW
(0.15)
DETAIL A
(0.20)
24
0.35
0.25
(7X)
1
5
PIN#1 IDENT 8
0.40
6
0.25
0.15
(8X)
0.10
BOTTOM VIEW ^0.05
CAB
C
0.10
0.20
45°
0.30
0.10
DETAIL : A
SCALE : 2X
NOTES:
A. PACKAGE DOES NOT FULLY CONFORM TO
JEDEC STANDARD.
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994.
D. LAND PATTERN RECOMMENDATION IS
BASED ON FSC DESIGN ONLY.
E. DRAWING FILENAME: MKT-UMLP08Arev3.
PACKAGE
EDGE
LEAD
OPTION 1
SCALE : 2X
LEAD
OPTION 2
SCALE : 2X
Figure 17. 8-Lead Ultrathin MLP, 1.2 mm x 1.4 mm
Product-Specific Dimensions
Symbol from JEDEC MO-220
A
A1
A3
b
D
E
L
e
Description
Overall Height
PKG Standoff
Lead Thickness
Lead Width
Body Length (X)
Body Width (Y)
Lead Length
Lead Pitch
NOM Value
0.55
0.012
0.15
0.2
1.4
1.2
0.3
0.4
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
Tape & Reel Format for MicroPak™
Always visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications:
http://www.fairchildsemi.com/dwg/UM/UMLP08A.pdf.
© 2010 Fairchild Semiconductor Corporation
FXMA2102 • Rev. 1.0.5
15
www.fairchildsemi.com