FAN5182 Datasheet, PDF (14/18 Pages) Fairchild Semiconductor – Adjustable Output 1, 2, or 3-Phase Synchronous Buck Controller

MOSFET’s switching speed (rise and fall time that the gate
driver can offer) and MOSFET input capacitance, the following
expression provides approximate switching loss for each main
MOSFET:
P_S(MF)
=
2
×
f_SW
×
V_{----C----C-----}×_----I_---O-
n_MF
×
R_G
×
n_----M----F-
n
×
C_ISS
(10)
where:
n_MF is the total number of main MOSFETs.
R_G is the total gate resistance (2Ω for the FAN5009 and about
1Ω for typical logic level n-channel MOSFETs, total R_G = 3Ω).
C_ISS is the input capacitance of the main MOSFET.
Note that adding more main MOSFETs (n_MF) does not help to
lower the switching loss for each main MOSFET, it can only
reduces conduction loss. The most efficient way to reduce
switching loss is to use low gate charge / capacitance devices.
The conduction loss of the main MOSFET is given by the follow-
ing equation:
P_C(MF) = D ×


n^---I-_M^-O---_F^{-}
2
+
--¹---
12
×


-ⁿ--_n--^×-_M----^I_F--^R-_
2
× R_DS(MF)
(11)
where R_DS(MF) is the on resistance of the main MOSFET.
Typically, for main MOSFETs, a low gate charge (C_ISS) device is
preferred, but low gate charge MOSFETs usually have higher
on resistance. Select a device that meets total power dissipation
around 1.5W for a single D-PAK MOSFET.
In this example, a FDD6296 is selected as the main MOSFET
(three total; n_MF = 3), with a C_ISS = 1440pF, and R_DS(MF) = 9mΩ
(at T_J = 120°C), and a FDD8896 is selected as the synchronous
MOSFET (three total; n_SF = 3), with C_ISS = 2525pF and R_DS(SF)
= 5.4mΩ (at T_J = 120°C). The synchronous MOSFET C_ISS is
less than 6000pF. Solving for the power dissipation per MOS-
FET at I_O = 55A and I_R = 6.6A yields 1.56W for each synchro-
nous MOSFET and 1.29W for each main MOSFET. These
numbers comply with the power dissipation limit of around 1.5W
per MOSFET.
One more item that needs to be considered is the power dissi-
pation in the driver for each phase. The gate drive loss is
described in terms of the Q_G for the MOSFETs, and is given by
the following equation
P_DRV =
f_--S---W--
n
× (n_{M F}
×Q_GMF+
n_{S F} ×Q_{G S F})
+
I_CC
×V_CC
(12)
where:
Q_GMF is the total gate charge for each main MOSFET.
Q_GSF is the total gate charge for each synchronous MOSFET.
I_CC × V_CC in equation (12) represents the driver's standby
power dissipation. For the FAN5009, the maximum dissipation
should be less than 400mW. In this example, with I_CC = 5mA,
Q_GMF = 25nC, and Q_GSF = 50nC, there is 285mW in each
driver, which is below the 400mW dissipation limit. See the
“Thermal Information” table in the FAN5009 datasheet for more
details.
Ramp Resistor Selection
The ramp resistor (R_R) is used for setting the size of the internal
PWM ramp. The value of this resistor is chosen to provide the
best combination of phase current balance, stability, and tran-
sient response. The following expression is used to determine
the optimum value:
R_R = ₃-----_×-----_A----_D-----_×----_R---^A-_D---^R-_S---₍^×--_O---^L_N----₎--₍--_S--_F---₎----_×----_C-----_R-
(13)
R_R = ₃-----_×-----₅-⁰---^._×--²---₄-^×--_.--₈-⁶--_m-⁰---⁰-_Ω--ⁿ----^H_×-----₅---_p----_F- = 333kΩ
where:
A_R is the internal ramp amplifier gain.
A_D is the current balancing amplifier gain.
R_DS(ON)(SF) is the equivalent low-side MOSFET on resistance.
C_R is the internal ramp capacitor value.
The closest standard 1% resistor value is 332kΩ.. The internal
ramp voltage magnitude can be calculated by using
V_R = -₍₍--_R-^V---_R-^I--^N-₊---^–--₂---^VK----^R-_Ω--^E---₎^F---_×⁾----^×-_C----^A_R----^R-_×---^×--_f-_S--^D-_W--
(14)
V_R = ₍---₃---₃---₂---_k--⁽--_Ω-¹---²--+--–---₂--⁰-_k--^.-⁸_Ω----⁾-₎--^×--_×---⁰--₅-^.--^2p---_F-^×----_×-⁰---^.-₂₁---₅₅---₀---_k----_H-----_z- = 805mV
The size of the internal ramp can be made larger or smaller. If it
is made larger, stability and transient response improve, but
thermal balance degrades. Likewise, if the ramp is made
smaller, thermal balance improves but transient response and
stability degrade. The factor of three in the denominator of
Equation 13 sets a ramp size with optimal balance for good sta-
bility, transient response, and thermal balance.
Current Limit Setpoint
The current limit threshold of the FAN5182 is set with a 3V
source (V_LIM) across R_LIM with a gain of 10.4 mV/µA (A_LIM).
R_LIM can be found using
R_LIM
=
A_{----L---I--M------}×_----V_{----L---I--M---}
V_DRPMAX
(15)
If R_LIM is greater than 500kΩ, the actual current limit threshold
may be lower than the intended value. Hence some adjustment
for R_LIM may be neeeed. Here, I_LIM is the average current limit
for the output of the supply. In this example, using the V_DRPMAX
value of 110mV from Equations 6 and 7 and choosing a peak
current limit of 110A for I_LIM results in R_LIM = 284kΩ, for which
287kΩ is chosen as the nearest 1% value.
The per phase current limit described earlier is determined by
I_PHLIM
≅
V_{----C----O----M---A-P--D-(--M--×--A---RX----)D---}–_-S--(-V_-M---R--A--–_-X---)-V_{----B---I--A---S-}
+
-^I--^R-
2
(16)
14
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FAN5182 Rev. 1.0.1