GTLP16T1655 Datasheet, PDF (12/14 Pages) Fairchild Semiconductor – 16-Bit LVTTL/GTLP Universal Bus Transceiver

Test Circuits and Timing Waveforms
Test Circuit for A Outputs
Test Circuit for B Outputs
Test
t_PLH/t_PHL
t_PLZ/t_PZL
t_PHZ/t_PZH
S
Open
6V
GND
Voltage Waveform - Propagation Delay Times
Note A: C_L includes probes and Jig capacitance.
Note B: For B-Port, C_L = 30 pF is used fort worst case.
Voltage Waveform - Setup and Hold Times
Voltage Waveform - Pulse Width
Voltage Waveform - Enable and Disable Times
Output Waveform 1 is for an output with internal conditions such that the
output is LOW except when disabled by the control output
Output Waveform 2 is for an output with internal conditions such that the
output is HIGH except when disabled by the control output
Input and Measure Conditions
A or LVTTL
Pins
B or GTLP
Pins
V_inHIGH
3.0
1.5
V_inLOW
0.0
0.0
V_M
1.5
1.0
V_X
V_OL + 0.3V
N/A
V_Y
V_OH − 0.3V
N/A
All input pulses have the following characteristics: Frequency = 10MHz, t_RISE = t_FALL = 2 ns, Z_O = 50Ω
The outputs are measured one at a time with one transition per measurement
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