FAN2103_12 Datasheet, PDF (10/14 Pages) Fairchild Semiconductor – 3 A, 24 V Input, Integrated Synchronous Buck Regulator

Circuit Description
Initialization
Once V_CC exceeds the UVLO threshold and EN is HIGH,
the IC checks for an open or shorted FB pin before
releasing the internal soft-start ramp (SS).
If R1 is open (as shown in Figure 1), the error amplifier
output (COMP) is forced LOW and no pulses are
generated. After the SS ramp times out (T1.0), an under-
voltage latched fault occurs.
If the parallel combination of R1 and R_BIAS is ≤ 1KΩ, the
internal SS ramp is not released and the regulator does
not start.
Soft-Start
Once internal SS ramp has charged to 0.8 V (T0.8), the
output voltage is in regulation. Until SS ramp reaches
1.0 V (T1.0), the “Fault Latch” is inhibited.
To avoid skipping the soft-start cycle, it is necessary to
apply V_IN before V_CC reaches its UVLO threshold.
Soft-start time is a function of oscillator frequency.
EN
1.35V
2400 CLKs
0.8V
FB
1. 0V
0. 8V
F ault
La t c h
Enable
SS
3200 CLKs
T0.8
4000 CLKs
T1.0
Figure 21. Soft-Start Timing Diagram
The regulator does not allow the low-side MOSFET to
operate in full synchronous rectification mode until
internal SS ramp reaches 95% of V_REF (~0.76 V). This
helps the regulator start against pre-biased outputs (as
shown in Figure 16) and ensures that inductor current
does not "ratchet" up during the soft-start cycle.
V_CC UVLO or toggling the EN pin discharges the SS and
resets the IC.
Bias Supply
The FAN2103 requires a 5 V supply rail to bias the IC
and provide gate-drive energy and controller power.
Connect a ≥ 1.0 µf X5R or X7R decoupling capacitor
between VCC and PGND. Whenever the EN pin is
pulled up to V_CC, the 5 V supply connected to V_CC
should be turned ON after V_IN comes up. If the power
supply is turned ON using EN pin with an external
control after V_CC and V_IN come up, the V_CC and V_IN
power sequencing is not relevant.
Since V_CC is used to drive the internal MOSFET gates,
supply current is frequency and voltage dependent.
Approximate V_CC current (I_CC) can be calculated using:
I_{CC(mA )}
=
4.58
+
[(
V_CC −
227
5
+
0.013) • (f
− 128)]
(1)
where frequency (f) is expressed in KHz.
Setting the Output Voltage
The output voltage of the regulator can be set from
0.8 V to ~80% of V_IN by an external resistor divider (R1
and R_BIAS in Figure 1).
The internal reference is 0.8 V with 650 nA, sourced
from the FB pin to ensure that if the pin is open, the
regulator does not start.
The external resistor divider is calculated using:
0.8V
R_BIAS
=
V_OUT − 0.8V
R1
+ 650nA
(2)
Connect R_BIAS between FB and AGND.
Setting the Frequency
Oscillator frequency is determined by an external resistor,
R_T, connected between the R(T) pin and AGND:
f_{(KHz )}
=
(65
10 ⁶
•R_T )
+ 135
(3)
where R_T is expressed in KΩ.
R_T(KΩ)
=
(10⁶
/ f ) − 135
65
(4)
where frequency (f) is expressed in KHz.
The regulator does not start if R_T is left open.
© 2007 Fairchild Semiconductor Corporation
FAN2103 • Rev. 1.0.8
10
www.fairchildsemi.com