XRT71D04 Datasheet, PDF (9/22 Pages) Exar Corporation – 4 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR, STS-1 TO DS3 DESYNCHRONIZER

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XRT71D04
4 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR, STS-1 TO DS3 DESYNCHRONIZER
REV. 1.1.1
PIN DESCRIPTION
PIN #
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
NAME
MCLK_1
GND
RCLK_1
RPOS_1
RNEG_1
VDD
RNEG_0
RPOS_0
RCLK_0
GND
MCLK_0
DJA_1/SDI
STS1_3
FL_3
AGND
TYPE
DESCRIPTION
I Master Clock Input - channel 1:
See description of pin 26.
Internal 50 K Ohm pull-up resistor.
**** Digital Ground
I Received Clock (Jittery) - channel 1:
See description of pin 28.
Internal 50 K Ohm pull-up resistor.
I Received Positive Data (Jittery) Input: - channel 1:
See description of pin 29.
Internal 50 K Ohm pull-up resistor.
I Received Negative Data (Jittery) - channel 1:
See description of pin 30.
Internal 50 K Ohm pull-up resistor.
**** Digital Power Supply = 5V±5% or 3.3V±5%
I Received Negative Data (Jittery) - channel 0:
See description of pin 30.
Internal 50 K Ohm pull-up resistor.
I Received Positive Data (Jittery) Input: - channel 0:
See description of pin 29.
Internal 50 K Ohm pull-up resistor.
I Received Clock (Jittery) - channel 0:
See description of pin 28.
Internal 50 K Ohm pull-up resistor.
**** Digital Ground
I Master Clock Input - channel 0:
See description of pin 26.
Internal 50 K Ohm pull-up resistor.
I Harware Mode
Disable Jitter Attenuator Input - Channel 1:
See description of pin 25
Host Mode
Serial Data Input
The address value (of the command registers) or the data value is either Read or
Written through this pin.
The input data will be sampled on the rising edge of the SCLK pin.
Internal 50 K Ohm pull-down resistor.
I SONET STS1 Mode Select - channel 3:
See description of pin 23
O FIFO Limit - channel 3:
See description of pin 22
**** Analog Ground
8