XRT71D04 Datasheet, PDF (16/22 Pages) Exar Corporation – 4 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR, STS-1 TO DS3 DESYNCHRONIZER

XRT71D04
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4 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR, STS-1 TO DS3 DESYNCHRONIZER
REV. 1.1.1
An asynchronous mapping for DS3 into STS-1 SPE is
defined for clear-channel transport of DS3 signals
that meet the DSX-3 requirements in the GR-499-
CORE.
When the input data has a rate lower than the output
data rate, the positive stuffing will occur. The stuffing
mechanism that generates the C-bits is implement-
ed in a desynchronizer that has the jitter output less
than 0.4 UIpp assuming no jitter or wander at the in-
put of the synchronizer and no pointer adjustments. A
block diagram of the Desynchronizer is shown in
Figure 8.
The elastic store accepts the STS-1 data stream and
a gapped clock. The gaps in the input clock inhibit the
elastic store from writing all but DS3 payload data.
The bit leaking circuit stores incoming STS-1 pointer
adjustments into a queue and leaks them out of the
desynchronizer one bit at a time.
STS-Nc signal is used to transport higher rate sig-
nals. However,the digital signals that SONET carries
do not fit in the SPE perfectly.
FIGURE 8. XRT71D04 DESYNCHRONIZER BLOCK DIAGRAM
STS-N
Clock
Recovery
STS-N
STS-1
reference clock
STS-1
gapped clock
STS-N
Clock
STS-1
Descramble/
Demux
OH
Processing
STS-1
Pointer
Processing
STS-1
Section &
Line Overhead
Elastic
Store
XRT71D04
DS3 payload
(dejittered)
Nth STS-1
STS-1
gapped clock
Dejittering &
Pointer
Adjustment
Stuff Control
15