XR16C864IQ-F Datasheet, PDF (7/51 Pages) Exar Corporation – 2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO

REV. 2.2.0
Pin Description
XR16C864
2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO
NAME
100-QFP
TYPE
PIN #
DESCRIPTION
CLKSEL
35
I Baud-Rate-Generator Input Clock Prescaler Select for channels A-D. This input is only
sampled during power up or a reset. Connect to VCC for divide by 1 and GND for divide
by 4. MCR[7] can override the state of this pin following a reset or initialization. See MCR
bit-7 and Figure 5 in the Baud Rate Generator section.
CHCCLK
42
I This input provides the clock for UART channel C. An external 16X baud clock or the
crystal oscillator’s output, XTAL2, must be connected to this pin for normal operation.
This input may also be used with MIDI (Musical Instrument Digital Interface) applications
when an external MIDI clock is provided.
RESET
43
(RESET#)
I When 16/68# pin is at logic 1 for Intel bus interface, this input becomes the Reset pin
(active high). In this case, a 40 ns minimum logic 1 pulse on this pin will reset the internal
registers and all outputs. The UART transmitter output will be held at logic 1, the receiver
input will be ignored and outputs are reset during reset period (Table 19). When 16/68#
pin is at a logic 0 for Motorola bus interface, this input becomes Reset# pin (active low).
This pin functions similarly, but instead of a logic 1 pulse, a 40 ns minimum logic 0 pulse
will reset the internal registers and outputs.
VCC
10, 61, Pwr 2.97V to 5.5V power supply. All input pins, except XTAL1, are 5V tolerant.
86
GND
20, 46, Pwr Power supply common, ground.
71, 96
Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain.
Factory Test Mode
If the IOR#, IOW# and CS# pins are all asserted (at a logic 0), the 864 will enter a Factory Test Mode.
7