XR16C864IQ-F Datasheet, PDF (38/51 Pages) Exar Corporation – 2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO

XR16C864
2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO
FCTR[5:4]: Transmit/Receive Trigger Table Select
See Table 11 for more details.
TABLE 17: TRIGGER TABLE SELECT
FCTR
BIT-5
0
0
1
1
FCTR
BIT-4
0
1
0
1
TABLE
Table-A (TX/RX)
Table-B (TX/RX)
Table-C (TX/RX)
Table-D (TX/RX)
REV. 2.2.0
FCTR[6]: Scratchpad Swap
• Logic 0 = Scratch Pad register is selected as general read and write register. ST16C550 compatible mode.
• Logic 1 = FIFO Count register (Read-Only), Enhanced Mode Select Register (Write-Only). Number of
characters in transmit or receive holding register can be read via scratch pad register when this bit is set.
Enhanced Mode Select Register is selected when it is written into.
FCTR[7]: Programmable Trigger Register Select
• Logic 0 = Registers TRG and FC selected for RX.
• Logic 1 = Registers TRG and FC selected for TX.
4.19 Enhanced Feature Register (EFR) - Read/Write
Enhanced features are enabled or disabled using this register. Bit 0-3 provide single or dual consecutive
character software flow control selection (see Table 18). When the Xon1 and Xon2 and Xoff1 and Xoff2 modes
are selected, the double 8-bit words are concatenated into two sequential characters. Caution: note that
whenever changing the TX or RX flow control bits, always reset all bits back to logic 0 (disable) before
programming a new setting.
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