XR68C681J-F Datasheet, PDF (63/75 Pages) Exar Corporation – CMOS Dual Channel UART(DUART)

Bit 7
Bit 6
Bit 5
Miscellaneous Commands
Bit 4
 ! ( Section B.2
XR68C681
Bit 3
Bit 2
Enable / Disable
Transmitter
 J 8
 -
 J 2 !
 J (% !
 J 8 ;($
 8 %
Bit 1
Bit 0
Enable / Disable
Receiver
 J 8
 -
 J 2 !
 J (% !
 J 8 ;($
 8 %
Bit 7
Received
Break
 J 8
 J E%
Table 23. Command Registers: CRA, CRB
Bit 6
Framing
Error
 J 8
 J E%
Bit 5
Parity Error
 J 8
 J E%
Bit 4
Overrun
Error
 J 8
 J E%
Bit 3
TXEMT
 J 8
 J E%
Bit 2
TXRDY
 J 8
 J E%
Bit 1
FFULL
 J 8
 J E%
Bit 0
RXRDY
 J 8
 J E%
Table 24. Status Registers: SRA, SRB
Bit 7
OP7
J,M@N
J5E*
Bit 6
OP6
J,M/N
J5E
Bit 5
OP5
J,M6N
J5E.
::*
Bit 4
OP4
J,M=N
J5E.
::
Bit 3
Bit 2
OP3
 J ,M1N
 J
. P 
 J 5
* 5
 J 5
* 5
Bit 1
OP2
 J ,MN
 J 5
/5
 J 5
5
 J 5
5
Bit 0
Bit 7
BRG Set
Select
 J 
 J 
Table 25. Output Port Configuration Register: OPCR
Bit 6
Bit 5
Bit 4
Counter/Timer #1 Mode and Source
 Table 4
Bit 3
Delta IP3
Interrupt
J
 J 8
Bit 2
Delta IP2
Interrupt
J
 J 8
Bit 1
Delta IP1
Interrupt
J
 J 8
Bit 0
Delta IP0
Interrupt
J
 J 8
Bit 7
Delta IP3
 J 8
 J E%
Table 26. Auxilliary Control Register: ACR
Bit 6
Delta IP2
 J 8
 J E%
Bit 5
Delta IP1
 J 8
 J E%
Bit 4
Delta IP0
 J 8
 J E%
Bit 3
IP3
 J :
 J 9(-
Bit 2
IP2
 J :
 J 9(-
Bit 1
IP1
 J :
 J 9(-
Table 27. Input Port Configuration Register , IPCR
Bit 0
IP0
 J :
 J 9(-
 
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