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XR68C681J-F Datasheet, PDF (30/75 Pages) Exar Corporation – CMOS Dual Channel UART(DUART) | |||
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XR68C681
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Table 10. Command Register Control Over the Extend Bit
Note: if the user programs either nibble of the Clock
Select Register (CSRn[7:4] or CSRn[3:0]) with values
ranging from 016 to C16, then the user is using the BRG as
a source for timing. However, these standard bit rates
(presented in Table 9) apply only if the X1/CLK pin is
driven with a 3.6864 MHz signal. If a signal with a different
frequency (fo) is applied to the X1/CLK pin, then the
DUART channel is running at the following baud rate:
Actual Baud Rate =
MTable Baud Rate ValueN ⢠fo
1/</= MHz
provided that fo is between 2.0 MHz and 4.0 MHz.
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