XR19L402 Datasheet, PDF (6/50 Pages) Exar Corporation – TWO CHANNEL INTEGRATED UART AND RS-485 TRANSCEIVER

XR19L402
TWO CHANNEL INTEGRATED UART AND RS-485 TRANSCEIVER
REV. 1.0.0
1.0 PRODUCT DESCRIPTION
The XR19L402 consists of a two-channel UART and RS-485 transceivers. It operates from a single +3.3V or
5.5V supply with data rates up to 8Mbps, while meeting all EIA RS-485 specifications. Its feature set is fully
compatible to the XR16V2751 device. Unlike the XR16V2751, most of the modem signals are not CMOS/TTL
level, but conform to RS-485 voltage levels. The only two signals that are CMOS/TTL level are the TXB and
RXB signals. They can be used with an external IR or RS-485 transceiver when their corresponding RS-485
signals, TXB+, TXB-, RXB+ and RXB- , are not used. The configuration register set is 16550 UART
compatible for control, status and data transfer. Also, the L402 has 64-bytes of transmit and receive FIFOs,
automatic Xon/Xoff and special character software flow control, transmit and receive FIFO trigger levels, and a
programmable fractional baud rate generator with a prescaler of divide by 1 or 4. Additionally, the L402
includes the ACP pin which the user can shut down the charge pump for the RS-485 drivers (when operating at
3.3V). In the UART portion, the Power-Save feature isolates the databus interface to further reduce power
consumption in the Sleep mode. The L402 is fabricated using an advanced CMOS process.
Enhanced Features
The L402 UART provides a solution that supports 64 bytes of transmit and receive FIFO. Increased
performance is realized in the L402 by the transmit and receive FIFOs, FIFO trigger level controls and
automatic flow control mechanism. This allows the external processor to handle more networking tasks within
a given time. This increases the service interval giving the external CPU additional time for other applications
and reducing the overall UART interrupt servicing time. In addition, the L402 provides the ACP and Power-
Save modes that drastically reduces the power consumption when the device is not used. The combination of
the above greatly reduces the CPU’s bandwidth requirement, increases performance, and reduces power
consumption.
Intel or Motorola Data Bus Interface
The L402 provides a host interface that supports Intel or Motorola microprocessor (CPU) data bus interface.
The Intel bus compatible interface allows direct interconnect to Intel compatible type of CPUs using IOR#,
IOW# and CS# inputs for data bus operation. The Motorola bus compatible interface instead uses the R/W#
and CS# signals for data bus transactions. See pin description section for details on all the control signals. The
Intel and Motorola bus interface selection is made through the pin, I/M#.
Data Rate
The L402 is capable of operation up to 8 Mbps data rate. The device can operate either with a crystal on pins
XTAL1 and XTAL2, or external clock source on XTAL1 pin.
Internal Enhanced Register Sets
The L402 UART has a set of enhanced registers providing control and monitoring functions. Interrupt enable/
disable and status, FIFO enable/disable, selectable TX and RX FIFO trigger levels, automatic hardware/
software flow control enable/disable, programmable baud rates, modem interface controls and status, sleep
mode and infrared mode are all standard features. Following a power on reset or an external reset (and
operating in 16 or Intel Mode), the registers defaults to the reset condition and is compatible with the
XR16V2751.
RS-485 Interface
The L402 includes RS-485 drivers/receivers for the interface. This feature eliminates the need for an external
RS-485 transceiver. The RS-485 transceiver can be selected to operate in either the half-duplex or full-duplex
mode via the HALF/FULL# pins. The RS-485 drivers guarantee a data rate of up to 8 Mbps.
All RS-485 drivers and receivers are protected to ±15kV using the Human Body Model ground combination,
±8kV using IEC 61000-4-2 Contact Discharge, and ±15kV using IEC 61000-4-2 Air-Gap Discharge. For more
information, send an e-mail to [e-mail].
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