XRT73L03A Datasheet, PDF (59/62 Pages) Exar Corporation – 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT

XRT73L03A
3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 2.0.4
This Read/Write bit-field, along with LLB_(n), is used
to configure Channel(n) to operate in any one of a va-
riety of Loop-Back modes.
Table 8 relates the contents of LLB_(n) and RLB_(n)
and the corresponding Loop-Back mode for Chan-
nel(n).
TABLE 8: CONTENTS OF LLB_(n) AND RLB_(n) AND THE CORRESPONDING LOOP-BACK MODE FOR CHANNEL(n)
LLB_(n)
RLB_(n)
LOOP-BACK MODE (FOR CHANNEL(n))
0
0
None
1
0
Analog Loop-Back Mode (See Section 4.1 for details)
1
1
Digital Loop-Back Mode (See Section 4.2 for details)
0
1
Remote Loop-Back Mode (See Section 4.3 for details)
5.3 OPERATING THE MICROPROCESSOR SERIAL
INTERFACE.
The XRT73L03A Serial Interface is a simple four wire
interface that is compatible with many of the micro-
controllers available in the market. This interface
consists of the following signals:
• CS - Chip Select (Active Low)
• SClk - Serial Clock
• SDI - Serial Data Input
• SDO - Serial Data Output
Using the Microprocessor Serial Interface
The following instructions for using the Microproces-
sor Serial Interface are best understood by referring
to the diagram in Figure 38 and the timing diagram in
Figure 39.
In order to use the Microprocessor Serial Interface, a
clock signal must be first applied to the SClk input pin.
Then, initiate a Read or Write operation by asserting
the active-low Chip Select input pin CS. It is impor-
tant to assert the CS pin (e.g., toggle it “Low") at least
5ns prior to the very first rising edge of the clock sig-
nal.
Once the CS input pin has been asserted, the type of
operation and the target register address must now
be specified. Provide this information to the Micro-
processor Serial Interface by writing eight serial bits
of data into the SDI input.
NOTE: Each of these bits is clocked into the SDI input on
the rising edge of SClk.
Bit 1 - R/W (Read/Write) Bit
This bit is clocked into the SDI input, on the first rising
edge of SClk after CS has been asserted. This bit in-
dicates whether the current operation is a Read or
Write operation. A "1" in this bit specifies a Read op-
eration, a "0" in this bit specifies a Write operation.
Bits 2 through 6: The five (5) bit Address Values
(labeled A0, A1, A2 , A3 and A4)
The next five rising edges of the SClk signal clocks in
the 5-bit address value for this particular Read or
Write operation. The address selects the Command
Register in the XRT73L03A that the user is either
reading data from or writing data to. The address bits
must be supplied to the SDI input pin in ascending or-
der with the LSB (least significant bit) first.
Bit 7:
A5 must be set to "0", as shown in Figure 38.
Bit 8 - A6
The value of A6 is a don't care.
Once these first 8 bits have been written into the Mi-
croprocessor Serial Interface, the subsequent action
depends upon whether the current operation is a
Read or Write operation.
Read Operation
Once the last address bit (A4) has been clocked into
the SDI input, the Read operation proceeds through
an idle period lasting two SClk periods. On the falling
edge of SClk Cycle #8 (see Figure 38) the serial data
output signal (SDO) becomes active. At this point,
reading the data contents of the addressed Com-
mand Register at Address [A4, A3, A2, A1, A0] via
the SDO output pin can begin. The Microprocessor
Serial Interface outputs this five bit data word (D0
through D4) in ascending order with the LSB first on
the falling edges of the SClk pin. Consequently, the
data on the SDO output pin is sufficiently stable for
reading by the Microprocessor on the very next rising
edge of the SClk pin.
Write Operation
Once the last address bit (A4) has been clocked into
the SDI input, the Write operation proceeds through
an idle period lasting two SClk periods. Prior to the
rising edge of SClk Cycle # 9 (see Figure 38). Apply
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