XRT73L03A Datasheet, PDF (18/62 Pages) Exar Corporation – 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT

XRT73L03A
3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 2.0.4
ELECTRICAL CHARACTERISTICS (CONTINUED) (TA = 25°C, VDD = 3.3V + 5%, UNLESS OTHERWISE SPECIFIED)
AC ELECTRICAL CHARACTERISTICS (SEE FIGURE 5)
TERMINAL SIDE TIMING PARAMETERS (SEE FIGURE 6 AND FIGURE 7) -- {(n) = 0, 1 OR 2 }
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNITS
TxClk_(n) Clock Duty Cycle (STS-1/DS3)
30
50
70
%
TxClk_(n) Clock Duty Cycle (E3)
30
50
70
%
TxClk_(n) Frequency (SONET STS-1)
51.84
MHz
TxClk_(n) Frequency (DS3)
44.736
MHz
TxClk_(n) Frequency (E3)
34.368
MHz
t_RTX TxClk_(n) Clock Rise Time (10% to 90%)
3
5
ns
t_FTX TxClk_(n) Clock Fall Time (90% to 10%)
3
5
ns
t_TSU TPData_(n)/TNData_(n) to TxClk_(n) Falling Set up time
3
1.5
ns
t_THO TPData_(n)/TNData_(n) to TxClk_(n) Falling Hold time
3
1.5
ns
t_LCVO RxClk_(n) to rising edge of LCV_(n) output delay
2.5
ns
t_TDY TTIP_(n)/TRing_(n) to TxClk_(n) Rising Propagation Delay time
8
ns
RxClk_(n) Clock Duty Cycle
50
%
RxClk_(n) Frequency (SONET STS-1)
51.84
MHz
RxClk_(n) Frequency (DS3)
44.736
MHz
RxClk_(n) Frequency (E3)
34.368
MHz
t_CO RxClk_(n) to RPOS_(n)/RNEG_(n) Delay Time
0
2.5
ns
t_RRX RxClk_(n) Clock Rise Time (10% to 90%)
t_{FRX RxClk_(n) Clock Fall Time (10% to 90%)}
C_I
Input Capacitance
C_L
Load Capacitance
1.5
ns
1.5
ns
10
pF
10
pF
NOTES:
1. All XRT73L03A digital inputs are designed to be
TTL 5V compliant.
2. All XRT73L03A digital outputs are also TTL 5V
compliant. However, these outputs will not drive to
5V nor will they accept external 5V pull-ups.
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