XRT73L06 Datasheet, PDF (51/63 Pages) Exar Corporation – SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT

SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
XRT73L06
REV. 1.0.2
6.2.1 Hardware Reset:
The hardware reset is initiated by pulling the RESET pin “Low” for a minimum of 5 µs. After the RESET pin is
released, the register values are put in default states.
TABLE 15: REGISTER MAP AND BIT NAMES
ADDRESS
PARAMETER
DATA BITS
(HEX)
NAME
7
6
5
4
3
2
1
0
0x00
APS/Redun-
dancy #1
Reserved
TxON_5 TxON_4 TxON_3 TxON_2 TxON-1 TxON_0
0x08
APS/ Redun-
dancy #2
Reserved
RxON_5 RxON_4 RxON_3 RxON_2 RxON_1 RxON_0
0x60
Interrupt Enable Reserved
(read/write)
INTEN_5 INTEN_4 INTEN_3 INTEN_2 INTEN_1 INTEN_0
0x61
Interrupt Status Reserved
(read only)
INTST_5 INTST_4 INTST_3 INTST_2 INTST_1 INTST_0
0x62 -
0x6D
Reserved
0x6E
Chip_id
0
x
1
1
1
1
1
0
(read only)
0x6F Chip_revision _id
(read only)
Chip version number
48