XRT73L06 Datasheet, PDF (5/63 Pages) Exar Corporation – SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT

XRT73L06
SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 1.0.2
3.3.1 B3ZS Encoding .................................................................................................................................. 26
3.3.2 HDB3 Encoding .................................................................................................................................. 26
Figure 17. Dual-Rail Data Format (encoder and decoder are disabled) ......................................................... 26
Figure 18. B3ZS Encoding Format ................................................................................................................. 26
3.4 TRANSMIT PULSE SHAPER ............................................................................................................................... 27
Figure 20. Transmit Pulse Shape Test Circuit ................................................................................................ 27
3.4.1 Guidelines for using Transmit Build Out Circuit ............................................................................. 27
Figure 19. HDB3 Encoding Format ................................................................................................................ 27
3.5 E3 LINE SIDE PARAMETERS .............................................................................................................................. 28
Figure 21. Pulse Mask for E3 (34.368 mbits/s) interface as per itu-t G.703 ................................................... 28
TABLE 3: E3 TRANSMITTER LINE SIDE OUTPUT AND RECEIVER LINE SIDE INPUT SPECIFICATIONS .......................... 29
Figure 22. Bellcore GR-253 CORE Transmit Output Pulse Template for SONET STS-1 Applications ......... 30
TABLE 4: STS-1 PULSE MASK EQUATIONS ........................................................................................................ 30
TABLE 5: STS-1 TRANSMITTER LINE SIDE OUTPUT AND RECEIVER LINE SIDE INPUT SPECIFICATIONS (GR-253) . 31
Figure 23. Transmit Ouput Pulse Template for DS3 as per Bellcore GR-499 ................................................ 31
TABLE 7: DS3 TRANSMITTER LINE SIDE OUTPUT AND RECEIVER LINE SIDE INPUT SPECIFICATIONS (GR-499) .... 32
TABLE 6: DS3 PULSE MASK EQUATIONS ........................................................................................................... 32
3.6 TRANSMIT DRIVE MONITOR .............................................................................................................................. 33
3.7 TRANSMITTER SECTION ON/OFF ....................................................................................................................... 33
Figure 24. Transmit Driver Monitor set-up. ..................................................................................................... 33
4.0 Jitter .................................................................................................................................................. 34
4.1 JITTER TOLERANCE .......................................................................................................................................... 34
4.1.1 DS3/STS-1 Jitter Tolerance Requirements ...................................................................................... 34
Figure 25. Jitter Tolerance Measurements ..................................................................................................... 34
4.1.2 E3 Jitter Tolerance Requirements .................................................................................................... 35
Figure 26. Input Jitter Tolerance For DS3/STS-1 .......................................................................................... 35
Figure 27. Input Jitter Tolerance for E3 ......................................................................................................... 35
4.2 JITTER TRANSFER ............................................................................................................................................ 36
TABLE 8: JITTER AMPLITUDE VERSUS MODULATION FREQUENCY (JITTER TOLERANCE) ....................................... 36
TABLE 9: JITTER TRANSFER SPECIFICATION/REFERENCES ................................................................................. 36
TABLE 10: JITTER TRANSFER PASS MASKS ....................................................................................................... 36
4.2.1 Jitter Generation ................................................................................................................................ 37
Figure 28. Jitter Transfer Requirements and Jitter Attenuator Performance .................................................. 37
5.0 Diagnostic Features ......................................................................................................................... 38
5.1 PRBS GENERATOR AND DETECTOR ................................................................................................................. 38
Figure 29. PRBS MODE ................................................................................................................................. 38
5.2 LOOPBACKS ................................................................................................................................................ 39
5.2.1 ANALOG LOOPBACK ........................................................................................................................ 39
Figure 30. Analog Loopback ........................................................................................................................... 39
5.2.2 DIGITAL LOOPBACK ......................................................................................................................... 40
5.2.3 REMOTE LOOPBACK ........................................................................................................................ 40
Figure 31. Digital Loopback ............................................................................................................................ 40
Figure 32. Remote Loopback ......................................................................................................................... 40
5.3 TRANSMIT ALL ONES (TAOS) .................................................................................................................... 41
Figure 33. Transmit All Ones (TAOS) ............................................................................................................. 41
6.0 Microprocessor interface Block ..................................................................................................... 42
TABLE 11: SELECTING THE MICROPROCESSOR INTERFACE MODE ...................................................................... 42
Figure 34. Simplified Block Diagram of the Microprocessor Interface Block .................................................. 42
6.1 THE MICROPROCESSOR INTERFACE BLOCK SIGNALS ........................................................................................ 43
TABLE 12: XRT73L06 MICROPROCESSOR INTERFACE SIGNALS ......................................................................... 43
6.2 ASYNCHRONOUS AND SYNCHRONOUS DESCRIPTION ......................................................................................... 44
TABLE 13: ASYNCHRONOUS TIMING SPECIFICATIONS ......................................................................................... 45
Figure 35. Asynchronous µP Interface Signals During Programmed I/O Read and Write Operations ........... 45
Figure 36. Synchronous µP Interface Signals During Programmed I/O Read and Write Operations ............ 46
TABLE 14: SYNCHRONOUS TIMING SPECIFICATIONS ........................................................................................... 46
Figure 37. Interrupt process ........................................................................................................................... 47
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