XRT73LC00A Datasheet, PDF (50/53 Pages) Exar Corporation – E3/DS3/STS-1 LINE INTERFACE UNIT

XRT73LC00A
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. P1.0.0
xr
PRELIMINARY
This Read/Write bit-field is used to configure the
XRT73LC00A to operate in either the SONET STS-1
Mode or the DS3 Mode.
Writing a “0” into this bit-field configures the
XRT73LC00A to operate in the DS3 Mode. Writing a
“1” into this bit-field configures the XRT73LC00A to
operate in the SONET STS-1 Mode.
NOTE: This bit-field is ignored if the E3 bit-field (D2 in this
Command Register) is set to “1”.
Bit D2 - E3 Mode Select
This Read/Write bit-field is used to configure the
XRT73LC00A to operate in the E3 Mode.
Writing a “0” into this bit-field configures the
XRT73LC00A to operate in either the DS3 or SONET
STS-1 Mode specified by the setting of the DS3 bit-
field in this Command Register. Writing a “1” into this
bit-field configures the XRT73LC00A to operate in the
E3 Mode.
Bit D1 - LLB (Local Loop-Back)
This Read/Write bit-field along with RLB (bit D0 in this
Command Register) is used to select which Loop-
Back mode the XRT73LC00A operates in. Table 6 re-
lates the state of the LLB and RLB to the selected
Loop-Back mode.
Bit D0 - RLB (Remote Loop-Back)
This Read/Write bit-field along with LLB (bit D1 in this
Command Register) is used to select which Loop-
Back mode the XRT73LC00A operate in. Table 6 re-
lates the state of the LLB and RLB bits to the selected
Loop-Back mode.
TABLE 6: LOOP-BACK MODES
LLB
RLB
(BIT D1) (BIT D0)
LOOP-BACK MODE
0
0
No Loop-Back Mode (Normal
Operation)
0
1
Remote Loop-Back Mode
1
0
Analog Loop-Back Mode
1
1
Digital Loop-Back Mode
5.2 OPERATING THE MICROPROCESSOR SERIAL
INTERFACE.
The XRT73LC00A Serial Interface is a simple four
wire interface that is compatible with many of the mi-
crocontrollers available in the market. This interface
consists of the following signals:
CS -
Chip Select (Active Low)
SCLK -
Serial Clock
SDI -
Serial Data Input
SDO -
Serial Data Output
Using the Microprocessor Serial Interface
The following instructions for using the Microproces-
sor Serial Interface are best understood by referring
to the diagram in Figure 34.
In order to use the Microprocessor Serial Interface, a
clock signal must be supplied to the SCLK input pin.
A Read or Write operation can then be initiated by as-
serting the active-low Chip Select input pin (CS). It is
important to assert the CS pin (e.g., toggle it “Low”) at
least 5ns prior to the very first rising edge of the clock
signal.
Once the CS input pin has been asserted, the type of
operation and the target register address must now
be specified. This information is supplied to the Mi-
croprocessor Serial Interface by writing eight serial
bits of data into the SDI input.
NOTE: Each of these bits is clocked into the SDI input on
the rising edge of SCLK. These eight bits are identified and
described below.
Bit 1 - R/W (Read/Write) Bit
This bit is clocked into the SDI input on the first rising
edge of SCLK after CS has been asserted. This bit
indicates whether the current operation is a Read or
Write operation. A “1” in this bit specifies a Read op-
eration, a “0” in this bit specifies a Write operation.
Bits 2 through 5: The four (4) bit Address Values
(labeled A0, A1, A2 and A3)
The next four rising edges of the SCLK signal clock in
the 4-bit address value for this particular Read (or
Write) operation. The address selects the Command
Register in the XRT73LC00A that the user is either
reading data from or writing data to. The address bits
must be supplied to the SDI input pin in ascending or-
der with the LSB (least significant bit) first.
Bits 6 and 7:
The next two bits, A4 and A5 must be set to “0” as
shown in Figure 34.
Bit 8:
The value of A6 is a “don’t care”.
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