XRT73LC00A Datasheet, PDF (4/53 Pages) Exar Corporation – E3/DS3/STS-1 LINE INTERFACE UNIT

XRT73LC00A
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. P1.0.0
xr
PRELIMINARY
COMMAND REGISTER CR2 (ADDRESS = 0X02) ............................................................................................ 25
2.4.1 Enabling the Transmit Line Build-Out Circuit ...................................................................... 25
COMMAND REGISTER CR1 (ADDRESS = 0X01) ............................................................................................ 25
2.4.2 Disabling the Transmit Line Build-Out Circuit ..................................................................... 26
2.4.3 Design Guideline for Setting the Transmit Line Build-Out Circuit ..................................... 26
COMMAND REGISTER CR1 (ADDRESS = 0X01) ............................................................................................ 26
2.4.4 The Transmit Line Build-Out Circuit and E3 Applications .................................................. 26
2.5 INTERFACING THE TRANSMIT SECTION OF THE XRT73LC00A TO THE LINE ........................................... 26
Figure 16. Recommended Schematic for Interfacing the Transmit Section of the XRT73LC00A to the Line . 26
TRANSFORMER RECOMMENDATIONS ............................................................................................... 27
3.0 The Receive Section ................................................................................................. 28
3.1 INTERFACING THE RECEIVE SECTION OF THE XRT73LC00A TO THE LINE ............................................. 28
Figure 17. Recommended Schematic for Interfacing the Receive Section of the XRT73LC00A to the Line
(Transformer-Coupling) ................................................................................................................. 28
Figure 18. Recommended Schematic for Interfacing the Receive Section of the XRT73LC00A to the Line (Ca-
pacitive-Coupling) ......................................................................................................................... 28
3.2 THE RECEIVE EQUALIZER BLOCK ......................................................................................................... 28
3.2.1 Guidelines for Setting the Receive Equalizer ....................................................................... 29
Figure 19. The Typical Application for the System Installer ........................................................................... 30
3.3 PEAK DETECTOR AND SLICER ............................................................................................................... 31
3.4 CLOCK RECOVERY PLL ....................................................................................................................... 31
COMMAND REGISTER CR2 (ADDRESS = 0X02) ............................................................................................ 31
3.5 THE HDB3/B3ZS DECODER ................................................................................................................ 31
3.5.1 B3ZS Decoding DS3/STS-1 Applications .............................................................................. 31
Figure 20. An Example of B3ZS Decoding ..................................................................................................... 32
3.5.2 HDB3 Decoding E3 Applications ........................................................................................... 32
Figure 21. An Example of HDB3 Decoding ..................................................................................................... 32
3.5.3 Enabling/Disabling the HDB3/B3ZS Decoder ....................................................................... 32
3.6 LOS DECLARATION/CLEARANCE .......................................................................................................... 33
COMMAND REGISTER CR2 (ADDRESS = 0X02) ............................................................................................ 33
3.6.1 The LOS Declaration/Clearance Criteria for E3 Applications ............................................. 33
Figure 22. The Signal Levels that the XRT73LC00A Declares and Clears LOS (E3 Mode Only) .................. 33
Figure 23. The Behavior of the LOS Output Indicator In Response to the Loss of Signal and the Restoration of
Signal ............................................................................................................................................ 34
3.6.2 The LOS Declaration/Clearance Criteria for DS3 and STS-1 Applications ........................ 34
TABLE 4: THE ALOS (ANALOG LOS) DECLARE AND CLEAR THRESHOLDS FOR A GIVEN SETTING OF LOSTHR AND
REQEN FOR DS3 AND STS-1 APPLICATIONS ..................................................................................... 34
COMMAND REGISTER CR0 (ADDRESS = 0X00) ............................................................................................ 35
COMMAND REGISTER CR2 (ADDRESS = 0X02) ............................................................................................ 35
3.6.3 Muting the Recovered Data while the LOS is being Declared ............................................ 35
COMMAND REGISTER CR0 (ADDRESS = 0X00) ............................................................................................ 35
COMMAND REGISTER CR2 (ADDRESS = 0X02) ............................................................................................ 35
3.7 ROUTING THE RECOVERED TIMING AND DATA INFORMATION TO THE RECEIVING TERMINAL EQUIPMENT .. 36
COMMAND REGISTER CR3 (ADDRESS = 0X03) ............................................................................................ 36
Figure 24. The Typical Interface for the Transmission of Data in a Dual-Rail Format From the Receive Section
of the XRT73LC00A to the Receiving Terminal Equipment .......................................................... 36
Figure 25. How the XRT73LC00A Outputs Data on the RPOS and RNEG Output Pins ............................... 37
Figure 26. The Behavior of the RPOS, RNEG and RCLK1 Signals When RCLK1 is Inverted ....................... 37
COMMAND REGISTER CR3 (ADDRESS = 0X03) ............................................................................................ 37
3.7.1 Routing Single-Rail Format data (Binary Data Stream) to the Receive Terminal Equipment
37
COMMAND REGISTER CR3 (ADDRESS = 0X03) ............................................................................................ 38
Figure 27. The Typical Interface for the Transmission of Data in a Single-Rail Format From the Receive Section
of the XRT73LC00A to the Receiving Terminal Equipment .......................................................... 38
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