XR16M580IM48-0A Datasheet, PDF (5/56 Pages) Exar Corporation – 1.62V TO 3.63V HIGH PERFORMANCE UART WITH 16-BYTE FIFO

REV. 1.0.0
Pin Description
XR16M580
1.62V TO 3.63V HIGH PERFORMANCE UART WITH 16-BYTE FIFO
NAME
RX
RTS#
CTS#
DTR#
DSR#
CD#
RI#
32-QFN 48-TQFP 25-BGA
PIN#
PIN#
PIN#
TYPE
DESCRIPTION
6
7
E4
I _{UART Receive Data or infrared receive data. Normal receive data}
input must idle at logic 1 condition. The infrared receiver idles at
logic 0. This input should be connected to VCC when not used.
21
32
B3
O _{UART Request-to-Send (active low) or general purpose output.}
This output must be asserted prior to using auto RTS flow control,
see EFR[6], MCR[1] and IER[6].
24
38
A1
I _{UART Clear-to-Send (active low) or general purpose input. It can}
be used for auto CTS flow control, see EFR[7], MSR[4] and IER[7].
This input should be connected to VCC when not used.
22
33
-
O _{UART Data-Terminal-Ready (active low) or general purpose output.}
25
39
-
I _{UART Data-Set-Ready (active low) or general purpose input. This}
input should be connected to VCC when not used.
26
40
-
I _{UART Carrier-Detect (active low) or general purpose input. This}
input should be connected to VCC when not used.
27
41
-
I _{UART Ring-Indicator (active low) or general purpose input. This}
input should be connected to VCC when not used.
ANCILLARY SIGNALS
XTAL1
10
14
XTAL2
11
15
PwrSave
9
13
16/68#
2
1
RESET
23
35
(RESET#)
VCC
GND
GND
28
42
13
18
Center
-
Pad
D5
I _{Crystal or external clock input.}
-
O _{Crystal or buffered clock output.}
C4
I _{Power-Save (active high). This feature isolates the M580’s data bus}
interface from the host preventing other bus activities that cause
higher power drain during sleep mode. See Sleep Mode with Auto
Wake-up and Power-Save Feature section for details. This pin does
not have an internal pull-down resistor. This input should be con-
nected to GND when not used.
B2
I _{Intel or Motorola Bus Select. When 16/68# pin is at logic 1, 16 or}
Intel Mode, the device will operate in the Intel bus type of interface.
When 16/68# pin is at logic 0, 68 or Motorola mode, the device will
operate in the Motorola bus type of interface. This pin does not
have an internal pull-up or pull-down resistor.
A2
I _{When 16/68# pin is at logic 1 for Intel bus interface, this input}
becomes RESET (active high). When 16/68# pin is at logic 0 for
Motorola bus interface, this input becomes RESET# (active low).
A 40 ns minimum active pulse on this pin will reset the internal reg-
isters and all outputs of the UART. The UART transmitter output will
be held at logic 1, the receiver input will be ignored and outputs are
reset during reset period (see UART Reset Conditions).
B1
Pwr _{1.62V to 3.63V power supply.}
E5
Pwr _{Power supply common, ground.}
-
Pwr _{The center pad on the backside of the QFN package is metallic and}
should be connected to GND on the PCB. The thermal pad size on
the PCB should be the approximate size of this center pad and
should be solder mask defined. The solder mask opening should be
at least 0.0025" inwards from the edge of the PCB thermal pad.
5