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XR20V2172 Datasheet, PDF (43/51 Pages) Exar Corporation – TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO AND RS232 TRANSCEIVER
REV. P1.0.1
PRELIMINARY
XR20V2172
TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO AND RS232 TRANSCEIVER
FIGURE 16. SCL DELAY AFTER RESET
RESET#
SCL
TD15
FIGURE 17. I2C-BUS TIMING DIAGRAM
Protocol
SCL
START
condition
(S)
Bit 7
MSB
(A7)
TSU;STA
TLOW THIGH
Bit 6
(A6)
1/FSCL
TF
TR
TBUF
SDA
THD;STA
TSU;DAT
THD;DAT
Bit 0
LSB
(R/W)
Acknowledge
(A)
STOP
condition
(P)
TSP
TVD;DAT
TVD;ACK
TSU;STO
FIGURE 18. WRITE TO OUTPUT
SDA
GPIOn
SLAVE
ADDRESS
W A IOSTATE REG. A
DATA
A
TD1
43