XR16M2751_07 Datasheet, PDF (42/53 Pages) Exar Corporation – 1.62V TO 3.63V HIGH PERFORMANCE DUART WITH 64-BYTE FIFO

XR16M2751
1.62V TO 3.63V HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
REV. 1.0.0
For PowerSave, the UART internally isolates all of these inputs (except the modem inputs) therefore
eliminating any unnecessary external buffers to keep the inputs steady. SEE”POWERSAVE FEATURE” ON
PAGE 20.
AC ELECTRICAL CHARACTERISTICS
UNLESS OTHERWISE NOTED: TA=0^O TO 70^OC (-40^O TO +85^OC FOR INDUSTRIAL GRADE PACKAGE), VCC=1.62 -
3.63V, 70 PF LOAD WHERE APPLICABLE
SYMBOL
PARAMETER
XTAL1
ECLK
UART Crystal Oscillator
External Clock
LIMITS
1.8V ± 10%
MIN
MAX
LIMITS
2.5V ± 10%
MIN
MAX
LIMITS
3.3V ± 10%
MIN
MAX
24
24
24
32
50
64
UNIT
MHz
MHz
T_ECLK
T_AS
T_AH
T_CS
T_RD
T_DY
T_RDV
T_DD
T_WR
T_DY
T_DS
T_DH
T_ADS
T_ADH
T_RWS
T_RDA
T_RDH
T_WDS
T_WDH
T_RWH
T_CSL
T_CSD
T_WDO
T_MOD
External Clock Time Period
Address Setup Time (16 mode)
Address Hold Time (16 mode)
Chip Select Width (16 mode)
IOR# Strobe Width (16 mode)
Read Cycle Delay (16 mode)
Data Access Time (16 mode)
Data Disable Time (16 mode)
IOW# Strobe Width (16 mode)
Write Cycle Delay (16 mode)
Data Setup Time (16 mode)
Data Hold Time (16 mode)
Address Setup (68 Mode)
Address Hold (68 Mode)
R/W# Setup to CS# (68 Mode)
Read Data Access (68 mode)
Read Data Disable (68 mode)
Write Data Setup (68 mode)
Write Data Hold (68 Mode)
CS# De-asserted to R/W# De-asserted (68
Mode)
CS# Width (68 Mode)
CS# Cycle Delay (68 Mode)
Delay From IOW# To Output
Delay To Set Interrupt From MODEM Input
15
10
7
ns
0
0
0
ns
0
0
0
ns
65
50
40
ns
65
50
40
ns
65
50
40
ns
60
45
35
ns
25
25
25
ns
65
50
40
ns
65
50
40
ns
20
10
10
ns
3
3
3
ns
0
0
0
ns
0
0
0
ns
0
0
0
ns
60
45
35
ns
25
25
25
ns
20
10
10
ns
5
5
5
ns
5
5
5
ns
65
50
40
ns
65
50
40
ns
50
50
50
ns
50
50
50
ns
42