XR16M2751_07 Datasheet, PDF (22/53 Pages) Exar Corporation – 1.62V TO 3.63V HIGH PERFORMANCE DUART WITH 64-BYTE FIFO

XR16M2751
1.62V TO 3.63V HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
REV. 1.0.0
3.0 UART INTERNAL REGISTERS
Each of the UART channel in the M2751 has its own set of configuration registers selected by address lines
A0, A1 and A2 with CSA# or CSB# selecting the channel. The complete register set is shown on Table 8 and
Table 9.
TABLE 8: UART INTERNAL REGISTERS
ADDRESSES
A2 A1 A0
REGISTER
READ/WRITE
COMMENTS
16C550 COMPATIBLE REGISTERS
0 00
RHR - Receive Holding Register
THR - Transmit Holding Register
Read-only
Write-only
LCR[7] = 0
0 00
0 01
DLL - Divisor LSB
DLM - Divisor MSB
Read/Write
Read/Write
LCR[7] = 1, LCR ≠ 0xBF
0 10
DLD - Divisor Fractional
Read/Write
LCR[7] = 1, LCR ≠ 0xBF,
EFR[4] = 1
0 00
0 01
DREV - Device Revision Code
DVID - Device Identification Code
Read-only
Read-only
DLL, DLM = 0x00,
LCR[7] = 1, LCR ≠ 0xBF
0 01
IER - Interrupt Enable Register
Read/Write
LCR[7] = 0
0 10
ISR - Interrupt Status Register
FCR - FIFO Control Register
Read-only
Write-only
LCR ≠ 0xBF
0 11
LCR - Line Control Register
Read/Write
1 00
MCR - Modem Control Register
Read/Write
1 01
LSR - Line Status Register
Read-only
LCR ≠ 0xBF
1 10
MSR - Modem Status Register
Read-only
1 11
SPR - Scratch Pad Register
Read/Write LCR ≠ 0xBF, FCTR[6] = 0
1 11
1 11
FLVL - RX/TX FIFO Level Counter Register
EMSR - Enhanced Mode Select Register
Read-only
Write-only
LCR ≠ 0xBF, FCTR[6] = 1
ENHANCED REGISTERS
0 00
TRG - RX/TX FIFO Trigger Level Register
FC - RX/TX FIFO Level Counter Register
Write-only
Read-only
0 01
FCTR - Feature Control Register
Read/Write
0 10
1 00
EFR - Enhanced Function Register
Xon-1 - Xon Character 1
Read/Write
Read/Write
LCR = 0xBF
1 01
Xon-2 - Xon Character 2
Read/Write
1 10
Xoff-1 - Xoff Character 1
Read/Write
1 11
Xoff-2 - Xoff Character 2
Read/Write
22