XR16V2650_07 Datasheet, PDF (40/47 Pages) Exar Corporation – HIGH PERFORMANCE DUART WITH 32-BYTE FIFO

XR16V2650
HIGH PERFORMANCE DUART WITH 32-BYTE FIFO
REV. 1.0.2
FIGURE 17. RECEIVE READY & INTERRUPT TIMING [NON-FIFO MODE] FOR CHANNELS A & B
RX
INT
RXRDY#
Start
Bit
D0:D7
Stop
Bit
T_SSR
1 Byte
in RHR
T_SSR
Active
Data
Ready
T_RR
D0:D7
T_SSR
1 Byte
in RHR
T_SSR
Active
Data
Ready
T_RR
D0:D7
T_SSR
1 Byte
in RHR
T_SSR
Active
Data
Ready
T_RR
IOR#
(Reading data
out of RHR)
RXNFM
FIGURE 18. TRANSMIT READY & INTERRUPT TIMING [NON-FIFO MODE] FOR CHANNELS A & B
TX
Start
Bit
D0:D7
Stop
Bit
IER[1]
enabled
ISR is read
D0:D7
ISR is read
INT*
T_WRI
TXRDY#
T_WRI
T_SRT
T_SRT
T_WRI
D0:D7
ISR is read
T_SRT
T_WT
T_WT
IOW#
(Loading data
into THR)
*INT is cleared when the ISR is read or when data is loaded into the THR.
T_WT
TXNonFIFO
40