XR88C192IV-F Datasheet, PDF (4/32 Pages) Exar Corporation – DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER

XR88C92/192
SYMBOL DESCRIPTION (* 44 pin LQFP)
Symbol
RXA, RXB
TXA, TXB
RESET
OP0
OP1
OP2
OP3
OP4
Pin
44
35,11
33,13
38
32
14
31
15
30
Signal
44* type
Pin Description
29,5 I Serial data input. The serial information (data) received from
serial port to XR88C92/192 receive input circuit. A mark (high)
is logic one and a space (low) is logic zero.This input must
be held at logic one when idle and during power down.
28,6 O Serial data output. The serial data is transmitted via this pin
with additional start , stop and parity bits. This output will be
held in mark (high) state during reset, local loop back mode
or when the transmitter is disabled.
32
I Master Reset (active high). A high on this pin will reset all the
outputs and internal registers. The transmitter output and
the receiver input will be disabled during reset time.
27
O Multi-purpose output. General purpose output or Channel A
Request-To-Send (-RTSA active low).
7
O Multi-purpose output. General purpose output or Channel B
Request-To-Send (-RTSB active low).
26
O Multi-purpose output. General purpose output or one of the
following functions can be selected for this output pin by
programming the Output Port Confiuration Register bits 1,0;
TxAClk1 -Transmit 1X clock.
TxAClk16 -Transmit 16X clock
RxAClk1 -Receive 1X clock
8
O Multi-purpose output. General purpose output or one of the
following functions can be selected for this output pin by
programming the Output Port Confiuration Register bits 3,2;
C/T -Counter timer output (Open drain output)
TxBClk1 -Transmit 1X clock
RxBClk1 -Receive 1X clock
25
O Multi-purpose output. General purpose output or one of the
following functions can be selected for this output pin by
programming the Output Port Confiuration Register bit 4;
-RxARDY -Receive ready signal (Open drain output)
-RxAFULL - Receive FIFO full signal (Open drain output)
Rev. 1.33
4