XR17V252 Datasheet, PDF (4/69 Pages) Exar Corporation – 66 MHZ PCI BUS DUAL UART WITH POWER MANAGEMENT SUPPORT

XR17V252
66 MHZ PCI BUS DUAL UART WITH POWER MANAGEMENT SUPPORT
PIN DESCRIPTIONS
REV. 1.0.1
NAME
PIN #
TYPE
DESCRIPTION
DSR0#
68
I UART channel 0 Data Set Ready or general purpose input (active low). This
input should be connected to VCC when not used.
CD0#
69
I UART channel 0 Carrier Detect or general purpose input (active low). This
input should be connected to VCC when not used.
RI0#
TX1
RX1
RTS1#
70
I UART channel 0 Ring Indicator or general purpose input (active low). This
input should be connected to VCC when not used.
62
O ^{UART channel 1 Transmit Data or infrared transmit data. Normal TXD output}
idles HIGH while infrared TXD output idles LOW.
55
I ^{UART channel 1 Receive Data or infrared receive data. Normal RXD input}
idles HIGH while infrared RXD input idles LOW. In the infrared mode, the
polarity of the incoming RXD signal can be selected via FCTR bit-4. If this bit
is a logic 0, a LOW on the RXD input is considered a mark and if this bit is a
logic 1, a HIGH on the RXD input is considered a space.
60
O UART channel 1 Request to Send or general purpose output (active low). If
this output is not used, leave it unconnected.
CTS1#
56
I UART channel 1 Clear to Send or general purpose input (active low). This
input should be connected to VCC when not used.
DTR1#
61
O UART channel 1 Data Terminal Ready or general purpose output (active
low). If this output is not used, leave it unconnected.
DSR1#
57
I UART channel 1 Data Set Ready or general purpose input (active low). This
input should be connected to VCC when not used.
CD1#
58
I UART channel 1 Carrier Detect or general purpose input (active low). This
input should be connected to VCC when not used.
RI1#
59
ANCILLARY SIGNALS
MPIO0-MPIO7
52-45
EECK
84
EECS
83
I UART channel 1 Ring Indicator or general purpose input (active low). This
input should be connected to VCC when not used.
I/O Multi-purpose inputs/outputs 0-7. The function of these pin are defined thru
the Configuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and
MPIOINT
O ^{Serial clock to EEPROM. An internal clock of CLK divide by 256 is used for}
reading the vendor and sub-vendor ID during power up or reset. However, it
can be manually clocked thru the Configuration Register REGB.
O Chip select to a EEPROM device like 93C46. It is manually selectable thru
the Configuration Register REGB. Requires a pull-up 4.7K ohm resister for
external sensing of EEPROM during power up. See DAN112 for further
details.
EEDI
82
O Write data to EEPROM device. It is manually accessible thru the Configura-
tion Register REGB. The V252 auto-configuration register interface logic
uses the 16-bit format.
EEDO
81
I Read data from EEPROM device. It is manually accessible thru the Configu-
ration Register REGB.
XTAL1
77
I Crystal or external clock input.
XTAL2
76
O Crystal or buffered clock output.
TMRCK
75
I 16-bit timer/counter external clock input.
4