XRT86VL34_2 Datasheet, PDF (32/156 Pages) Exar Corporation – QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION

XRT86VL34
QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
TABLE 11: RECEIVE SIGNALING & DATA LINK SELECT REGISTER (RSDLSR)
REV. V1.2.0
HEX ADDRESS: 0Xn10C
BIT
FUNCTION
TYPE DEFAULT
DESCRIPTION-OPERATION
1-0 RxDL[1:0]
R/W
00 Receive Data-Link Destination Select[1:0]:
These bits specify the destination circuitry, that is used to process the
Data-Link data, within the incoming T1 data-stream.
RXDL[1:0] DESTINATION CIRCUITRY FOR RECEIVE DATA-LINK
00
Receive LAPD Controller Block # 1 and
RxSER_n - The Data Link bits are routed to the
Receive LAPD Controller block #1 and the
RxSER_n output pin
NOTE: LAPD Controller #1 is the only LAPD
controller that can be used to extract
LAPD messages through the data link bits
01
RxSER_n- The Data Link bits are routed to the
RxSER_n output pin.
10
RxOH_n and RxSER_n - The Data Link bits are
routed to the RxOH_n and RxSER_n output pins.
11
Data Link bits are forced to 1.
27