XR19L200 Datasheet, PDF (27/40 Pages) Exar Corporation – SINGLE CHANNEL INTEGRATED UART AND RS-232 TRANSCEIVER

PRELIMINARY
XR19L200
REV. P1.0.2
SINGLE CHANNEL INTEGRATED UART AND RS-232 TRANSCEIVER
EFR[5]: Special Character Detect Enable
• Logic 0 = Special Character Detect Disabled (default).
• Logic 1 = Special Character Detect Enabled. The UART compares each incoming receive character with
data in Xoff-2 register. If a match exists, the receive data will be transferred to FIFO and ISR bit-4 will be set
to indicate detection of the special character. Bit-0 corresponds with the LSB bit of the receive character. If
flow control is set for comparing Xon1, Xoff1 (EFR [1:0]= ‘10’) then flow control and special character work
normally. However, if flow control is set for comparing Xon2, Xoff2 (EFR[1:0]= ‘01’) then flow control works
normally, but Xoff2 will not go to the FIFO, and will generate an Xoff interrupt and a special character
interrupt, if enabled via IER bit-5.
EFR[7:6]: Reserved
For proper functionality, these bits should remain at a ’0’.
4.16 Software Flow Control Registers (XOFF1, XOFF2, XON1, XON2) - Write Only
These registers are used as the programmable software flow control characters xoff1, xoff2, xon1, and xon2.
For more details, refer to “Section 2.12, Auto Xon/Xoff (Software) Flow Control” on page 11.
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