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XR17V354IB-E4-EVB Datasheet, PDF (23/67 Pages) Exar Corporation – HIGH PERFORMANCE QUAD PCI-EXPRESS UART | |||
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REV. 1.0.4
TIMER OPERATION
XR17V354
HIGH PERFORMANCE QUAD PCI-EXPRESS UART
The following paragraphs describe the operation of the 16-bit Timer/Counter. The following conventions will be
used in this discussion:
â âNâ is the 16-bit value programmed in the TIMER MSB, LSB registers
â P +Q = N, where âPâ and âQâ are approximately half of âNâ.
â If N is even, P = Q = N/2.
â If N is odd, P = (N â 1)/2 and Q = (N + 1)/2.
â âNâ can take any value from 0x0002 to 0xFFFF.
Timer Operation in One-Shot Mode:
In the one-shot mode, the Timer output will stay HIGH when started (default state) and will continue to stay
HIGH until it times out (reaches the terminal count of âNâ clocks), at which time it will become LOW and stay
LOW. If the Timer is re-started before the Timer times out, the counter is reset and the Timer will wait for
another time-out period before setting its output LOW (See Figure 7). If the Timer times out, re-starting the
Timer does not have any effect and a âStop Timerâ command needs to be issued first which will set the Timer
output to its default HIGH state. The Timer must be programmed while it is stopped since the following
operations are blocked after the Timer has been started:
â Any write to TIMER MSB, LSB registers
â Issue of any command other than âStart Timerâ, âStop Timerâ and âReset Timerâ
Timer Operation in Re-triggerable Mode:
In the re-triggerable mode, when the Timer is started, the Timer output will stay HIGH until it reaches half of the
terminal count N (= P clocks) and toggle LOW and stay LOW for a similar amount of time (Q clocks). The
above step will keep repeating until the Timer is stopped at which time the output will become HIGH (default
state). See Figure 7. Also, after the Timer is started, re-starting the Timer does not have any effect in re-
triggerable mode. The Timer must be programmed while it is stopped since the following operations are
blocked when the Timer is running:
â Any write to TIMER MSB, LSB registers
â Issue of any command other than âStop Timerâ and âReset Timerâ (âStart Timerâ is not allowed)
Routing the Timer Output to MPIO[0] Pin:
MPIO[0] pin is by default (on power up or reset, for example) an input. However, whenever the Timer output is
routed to MPIO[0] pin,
â MPIO[0] will be automatically selected as an output
â MPIO[0] will become HIGH (the default state of Timer output)
â All MPIO control registers (MPIOLVL, MPIOSEL etc) lose control over MPIO[0] and get the control back
only when the Timer output is de-routed from MPIO[0].
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