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XRT94L33_3 Datasheet, PDF (189/801 Pages) Exar Corporation – -CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER - SONET REGISTERS | |||
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Rev222...000...000
XRT94L33
333---CCCHHHAAANNNNNNEEELLL DDDSSS333///EEE333///SSSTTTSSS---111 TTTOOO SSSTTTSSS---333///SSSTTTMMM---111 MMMAAAPPPPPPEEERRR âââ SSSOOONNNEEETTT RRREEEGGGIIISSSTTTEEERRRSSS
within 125us of the NE declaring the LOF defect.
2. In the case of Bit 2 (Transmit AIS-P Downstream â Upon LOF),
several SONET frame periods are required (after the Receive STS-3
TOH Processor block has declared the LOS defect), before the Transmit
STS-1 POH Processor blocks will begin the process of transmitting the
AIS-P indicators.
3. In addition to setting this bit-field to â1â, the user must also set Bit 0
(Transmit AIS-P via Downstream STS-1s Enable) within this register, in
order enable this feature.
For those channels that are configured to operate in the DS3 Mode:
This READ/WRITE bit-field permits the user to configure all of the active
DS3/E3 Framer blocks (within the XRT94L33 device) to automatically
transmit the DS3 AIS indicator via the âdownstreamâ (or Egress
Direction) DS3 signals, anytime (and for the duration that) the Receive
STS-3 TOH Processor block declares the LOF defect condition.
0 â Does not configure all âactiveâ DS3/E3 Framer blocks to
automatically transmit the DS3 AIS indicator via the âdownstreamâ DS3
signals, anytime the Receive STS-3 TOH Processor block declares the
LOF defect condition.
1 â Configures all âactiveâ DS3/E3 Framer blocks to automatically
transmit the DS3 AIS Indicator via the âdownstreamâ DS3 signals,
anytime (and for the duration that) the Receive STS-3 TOH Processor
block declares the LOF defect condition.
NOTE: In addition to setting this bit-field to â1â, the user must also set Bit
0 (Transmit AIS-P/AIS via Downstream STS-1s/DS3s Enable) within this
register, in order to enable this feature.
3
Transmit AIS-P/AIS (via R/W Transmit AIS-P (via Downstream STS-1s) upon declaration of the
Downstream STS-
SD (Signal Degrade) defect condition/Transmit DS3 AIS (via
1s/DS3s) upon SD
Downstream DS3s) upon declaration of the SD defect condition:
The exact function of this bit-field depends upon whether the XRT94L33
device has been configured to handle STS-1 or DS3 signals, on the âlow-
speedâ side of the chip, as described below.
For those channels that are configured to operate in the STS-1
Modes:
This READ/WRITE bit-field permits the user to configure all of the active
Transmit STS-1 POH Processor blocks (within the XRT94L33 device) to
automatically transmit the AIS-P (Path AIS) Indicator via the
âdownstreamâ STS-1 signals, anytime (and for the duration that) the
Receive STS-3 TOH Processor block declares the SD defect condition.
0 â Does not configures all âactivatedâ Transmit STS-1 POH Processor
blocks to automatically transmit the AIS-P Indicator via the âdownstreamâ
STS-1 signals, anytime the Receive STS-3 TOH Processor block
declares the SD defect condition.
1 â Configures all âactivatedâ Transmit STS-1POH Processor blocks to
automatically transmit the AIS-P Indicator via the âdownstreamâ STS-1
signals, anytime (and for the duration that) the Receive STS-3 TOH
Processor block declares the SD defect condition.
Note:
1. In the âlong-runâ the function of this bit-field is exactly the same as that
of Bit 4 (Transmit AIS-P Down-stream â Upon SD), within the Receive
STS-3 Transport â Auto AIS Control Register (Address Location=
0x1163). The only difference is that this register bit will cause each of
the âdownstreamâ Transmit STS-1 POH Processor blocks to
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