XRP7720 Datasheet, PDF (18/28 Pages) Exar Corporation – Quad Output Universal Customizable PMIC with PFM

XRP7720
Quad Output Universal Customizable PMIC with PFM
SUPERVISORY AND CONTROL
Power system design with XRP7720 is
accomplished using PowerArchitect™ design
tool version 5.1 (PA 5.1). All figures
referenced in the following sections are taken
from PA 5.1.
DIGITAL I/O
XRP7720 has two General Purpose Input
Output (GPIO) and three Power System Input
Output (PSIO) user configurable pins.
 GPIOs are 3.3V CMOS logic compatible
and 5V tolerant.
 PSIO configured as outputs are open
drain and require external pull-up
resistor. These I/Os are 3.3V and 5V
CMOS logic compatible, and up to 15V
capable.
The polarity of the GPIO/PSIO pins is set in
PA 5.1.
 Power Group Enable – controls
enabling and disabling of Group 1 and
Group 2
 Power Channel Enable – controls
enabling and disabling of an individual
channel.
 Power OK – indicates that selected
channels have reached their target levels
and have not faulted. Multiple channel
selection is available in which case the
resulting signal is the AND logic function
of all channels selected
 ResetOut – is delayed Power OK. Delay
is programmable in 1msec increments
with the range of 0 to 255 msec
 Low Vcc – indicates when Vcc has fallen
below the UVLO fault threshold and
when the UVLO condition clears (Vcc
voltage rises above the UVLO warning
level)
Low Vcc, Power OK and ResetOut signals can
only be forwarded to a single GPIO/PSIO.
In addition, the following are functions that
are unique to GPIO0 and GPIO1.
Configuring GPIO/PSIOs
The following functions can be controlled from
or forwarded to any GPIO/PSIO:
HW Flags – these are hardware monitoring
functions forwarded to GPIO0 only. The
functions include Under-Voltage Warning,
Over- Temperature Warning, Over-Voltage
Fault, Over-Current Fault and Over -Current
Warning for every channel. Multiple selections
will be combined using the OR logic function.
© 2014 Exar Corporation
18/28
Rev. 1.0.0