XRP7720 Datasheet, PDF (10/28 Pages) Exar Corporation – Quad Output Universal Customizable PMIC with PFM

XRP7720
Quad Output Universal Customizable PMIC with PFM
Name
GH1-GH4
LX1-LX4
BST1-BST4
GPI0-GPIO1
PSIO0-PSIO2
GND
SDA, SCL
VOUT1-VOUT4
LDO5
ENABLE
DGND
V5EXT
AVDD
PAD
N/C
Pin Number
36,30, 25,19
37,31, 26,20
35,29, 24,18
9,10
13,14,15
11, 12
11,12
5,6,7,8
44
40
17
43
4
45
1,3,42
Description
Output pin of the high side gate driver. Connect directly to the gate of an external N-
channel MOSFET.
Lower supply rail for the GH high-side gate driver. Connect this pin to the switching
node at the junction between the two external power MOSFETs and the inductor. These
pins are also used to measure voltage drop across bottom MOSFETs in order to provide
output current information to the control engine.
High side driver supply pin(s). Connect BST to the external capacitor as shown in the
Typical Application Circuit on page 2. The high side driver is connected between the
BST pin and LX pin and delivers the BST pin voltage to the high side FET gate each
cycle.
These pins may be configured as inputs or outputs to implement custom flags, power
good signals, enable/disable controls and synchronization to an external clock.
Open drain, these pins may be used to control external power MOSFETs to switch loads
on and off, shedding the load for fine-grained power management. They may also be
configured as standard logic outputs or inputs just as any of the GPIOs can be
configured, but as open drains they will require an external pull-up when configured as
outputs.
XRP7720ILB-XXXX-F. These pins should be tied to ground.
XRP7720ILB-DEV-F Only. SMBus/I²C serial interface communication pins for
communication to PowerArchitect^TM 5.1 using XRP77XXEVB-XCM (Exar Configuration
Module). Accommodation should be made in the board layout to tie these pins to
ground for production.
Connect to the output of the corresponding power stage. The output is sampled at least
once every switching cycle
Output of a 5V LDO. This is a micro power LDO that can remain active while the rest of
the IC is in standby mode. This LDO is also used to power the internal Analog Blocks.
If ENABLE is pulled high or allowed to float high, the chip is powered up (logic is reset,
registers configuration loaded, etc.). The pin must be held low for the XRP7720 to be
placed into shutdown.
Digital ground pin. This is the logic ground connection, and should be connected to the
ground plane close to the PAD.
External 5V that can be provided. If one of the output channels is configured for 5V,
then this voltage can be fed back to this pin for reduced operating current of the chip
and improved efficiency.
Output of the internal 1.8V LDO. A decoupling capacitor should be placed between
AVDD and AGND close to the chip.
This is the die attach paddle, which is exposed on the bottom of the part. Connect
externally to the ground plane.
No Connect
ORDERING INFORMATION
Part Number
XRP7720ILB-DEV-F
XRP7720ILBTR-XXXX-F*
XRP7720EVB-DEMO-1
XRP7720EVB-DEMO-1-KIT
Temperature
Range
Marking
Package
Packing
Quantity
Note 1
-40°C≤TJ≤+125°C
-40°C≤TJ≤+125°C
XRP7720ILB
YYWW
Lot#
XRP7720ILB
YYWW
Lot#
44-pin TQFN
Tray
2.5K/Tape &
Reel
Halogen Free
Halogen Free
XRP7720EVB Power Board Only
XRP7720EVB Power Board, USB Stick, XRP77XXEVB-XCM, USB Cable, Ribbon Connector
“YY” = Year – “WW” = Work Week
*Minimum order requirements apply; please contact your Exar representative.
© 2014 Exar Corporation
10/28
Rev. 1.0.0