XR22804 Datasheet, PDF (16/47 Pages) Exar Corporation – Hi-Speed USB to 10/100 Ethernet Bridge with 4 UARTs

XR22804
Automatic DTR / DSR hardware flow control
Auto DTR/DSR hardware flow control behaves the same as the Auto RTS/CTS hardware flow control described above
except that it uses the DTR# and DSR# signals. For Auto hardware flow control, FLOW_CONTROL[2:0] = ’001’. E[n]/DTR#/
G[n] and E[n]/DSR#/G[n] of each UART channel become DTR# and DSR#, respectively, when GPIO_MODE[2:0] = ’010’.
Automatic XON / XOFF software flow control
When software flow control is enabled, the XR22804 compares the receive data characters with the programmed Xon or
Xoff characters. If the received character matches the programmed Xoff character, the XR22804 will halt transmission as
soon as the current character has completed transmission. Data transmission is resumed when a received character
matches the Xon character. Software flow control is enabled when FLOW_CONTROL[2:0] = ’010.’
Automatic RS-485 half duplex control
The Auto RS-485 Half-Duplex Control feature changes the behavior of the E[n]/RTS#/RS485/G[n] pin of a UART channel
when enabled by the GPIO_MODE register bits 2-0. See GPIO_MODE Register Description on page 24. The FLOW_CON-
TROL register must also be set appropriately for use in multidrop applications. See FLOW_CONTROL Register Description
on page 22. If enabled, the transmitter automatically asserts the E[n]/RTS#/RS485/G[n] output prior to sending the data. By
default, it de-asserts E[n]/RTS#/RS485/G[n] following the last stop bit of the last character that has been transmitted, but
the RS485_DELAY register may be used to delay the deassertion. The polarity of the E[n]/RTS#/RS485/G[n] signal can
also be modified using the GPIO_MODE register bit 3.
Multidrop mode with address matching
The XR22804 device has two address matching modes which are also set by the flow control register using modes 3 and 4.
These modes are intended for a multi-drop network application. In these modes, the XON_CHAR register holds a unicast
address and the XOFF_CHAR holds a multicast address. A unicast address is used by a transmitting master to broadcast
an address to all attached slave devices that is intended for only one slave device. A multicast address is used to broadcast
an address intended for more than one recipient device. Each attached slave device should have a unique unicast address
value stored in the XON_CHAR register, while multiple slaves may have the same multicast adderss stored in the
XOFF_CHAR register. An address match occurs when an address byte (9th bit or parity bit is ’1’) is received that matches
the value stored in either the XON_CHAR or XOFF_CHAR register.
Multidrop mode receiver
If an address match occurs in either flow control mode 3 or 4, the UART Receiver will automatically be enabled and all sub-
sequent data bytes will be loaded into the RX FIFO. The UART Receiver will automatically be disabled when an address
byte is received that does not match the values in the XON_CHAR or XOFF_CHAR register.
Multidrop mode transmitter
In flow control mode 3, the UART transmitter is always enabled, irrespective of the RX address match. In flow control mode
4, the UART transmitter will only be enabled if there is an RX address match.
Programmable Turn-Around Delay
By default, the E[n]/RTS#/RS485/G[n] pin will be de-asserted immediately after the stop bit of the last byte has been shifted.
However, this may not be ideal for systems where the signal needs to propagate over long cables. Therefore, the de-asser-
tion of E[n]/RTS#/RS485/G[n] pin can be delayed from 1 to 15 bit times via the RS485_DELAY register to allow for the data
to reach distant UARTs.
Half-duplex mode
Half-duplex mode is enabled when FLOW_CONTROL[3] = 1. In this mode, the UART will ignore any data on the RX input
when the UART is transmitting data.
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