XR22804 Datasheet, PDF (14/47 Pages) Exar Corporation – Hi-Speed USB to 10/100 Ethernet Bridge with 4 UARTs

XR22804
UART receiver - Normal mode with 9-bit data
The first 8 bits of data received is stored in the RX FIFO. The 9th bit as well as any parity, framing or overrun error or break
status information related to the data is discarded.
7, 8 or 9-bit data
1^ST byte 7 6 5 4 3 2 1 0 7 = ‘0’ in 7 bit mode
Figure 1: UART Normal Receive Data Format with 7 or 8-bit data
UART receiver - Wide mode with 7 or 8-bit data
Two bytes of data are loaded into the RX FIFO for each byte of data received. The first byte is the received data. The sec-
ond byte consists of the error bits and break status. Wide mode receive data format is shown in Figure 2. Use the
RX_WIDE_MODE register to enable receive wide mode. Use the RX_WIDE_MODE register to enable receive wide mode.
UART receiver - Wide mode with 9-bit data
Two bytes of data are loaded into the RX FIFO for each byte of data received. The first byte is the first 8 bits of the received
data. The 9th bit received is stored in the bit 0 of the second byte. The parity bit is not received / checked. The remainder of
the 2nd byte consists of the framing and overrun error bits and break status.
1st byte
2nd byte
1st byte
2nd byte
7 or 8 bit mode
76543210
x x x x OF B P
9 bit mode
76543210
x x x x OF B 8
7 = ‘0’ in 7 bit mode
P = Parity Error (= ‘0’ if not enabled)
B = Break
F = Framing Error
O = Overrun Error
x = ‘0’
B = Break
F = Framing Error
O = Overrun Error
x = ‘0’
Figure 2: UART Receive Wide Mode Data Format with 7, 8 or 9-bit data
Error flags are also available from the ERROR_STATUS register and the interrupt packet, however these flags are historical
flags indicating that an error has occurred since the previous request. Therefore, no conclusion can be drawn as to which
specific byte(s) may have contained an actual error in this manner.
RX FIFO Low Latency
In normal operation all bulk-in transfers will be of maxPacketSize bytes (512 bytes in hi-speed mode and 64 bytes in full-
speed mode) to improve throughput and to minimize host processing. When there are 512 / 64 bytes of data in the RX FIFO,
the XR22804 will acknowledge a bulk-in request from the host and transfer the data packet. If there is less than 512 bytes in
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