XR17D158_05 Datasheet, PDF (15/73 Pages) Exar Corporation – UNIVERSAL (3.3V AND 5V) PCI BUS OCTAL UART

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REV. 1.2.2
XR17D158
UNIVERSAL (3.3V AND 5V) PCI BUS OCTAL UART
TABLE 3: XR17D158 DEVICE CONFIGURATION REGISTERS
OFFSET ADDRESS
MEMORY SPACE
0x740 - 0x77F
Reserved
READ/WRITE
DATA WIDTH
COMMENT
0x780 - 0x7FF
UART 3 – Read FIFO
with errors
Read-Only
16/32 64 bytes of RX FIFO data + LSR
0x800 - 0x80F
UART channel 4 Regs
0x810 - 0x8FF
0x900 - 0x93F
0x900 - 0x93F
0x940 - 0x97F
0x980 - 0x9FF
Reserved
UART 4 – Read FIFO
UART 4 – Write FIFO
Reserved
UART 4 – Read FIFO
with errors
(Table 12 &
Table 13)
Read-Only
Write-Only
Read-Only
8/16/24/32 First 8 regs are 16550 compatible
8/16/24/32 64 bytes of RX FIFO data
8/16/24/32 64 bytes of TX FIFO data
16/32 64 bytes of RX FIFO data + LSR
0xA00 - 0xA0F UART channel 5 Regs
0xA10 - 0xAFF
0xB00 - 0xB3F
0xB00 - 0xB3F
0xB40 - 0xB7F
0xB80 - 0xBFF
Reserved
UART 5 – Read FIFO
UART 5 – Write FIFO
Reserved
UART 5 – Read FIFO
with errors
(Table 12 &
Table 13)
ite
Read-Only
Write-Only
Read-Only
8/16/24/32 First 8 regs are 16550 compatible
8/16/24/32 64 bytes of RX FIFO data
8/16/24/32 64 bytes of TX FIFO data
16/32 64 bytes of RX FIFO data + LSR
0xC00 - 0xC0F UART channel 6 Regs
0xC10 - 0xCFF
0xD00 - 0xD3F
0xD00 - 0xD3F
0xD40 - 0xD7F
0xD80 - 0xDFF
Reserved
UART 6 – Read FIFO
UART 6 – Write FIFO
Reserved
UART 6 – Read FIFO
with errors
(Table 12 &
Table 13)
Read-Only
Write-Only
Read-Only
8/16/24/32 First 8 regs are 16550 compatible
8/16/24/32 64 bytes of RX FIFO data
8/16/24/32 64 bytes of TX FIFO data
16/32 64 bytes of RX FIFO data + LSR
0xE00 - 0xE0F UART channel 7 Regs
0xE10 - 0xEFF
0xF00 - 0xF3F
0xF00 - 0xF3F
Reserved
UART 7 – Read FIFO
UART 7 – Write FIFO
(Table 12 &
Table 13)
Read-Only
Write-Only
8/16/24/32 First 8 regs are 16550 compatible
8/16/24/32 64 bytes of RX FIFO data
8/16/24/32 64 bytes of TX FIFO data
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