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XRS10L210 Datasheet, PDF (12/37 Pages) Exar Corporation – SERIAL ATA II: PORT SELECTOR
EXSTOR - 1 XRS10L210
SERIAL ATA II: PORT SELECTOR
REV. 1.04
The two host ports are responsible for coordination of access to the XRS10L210 by one of two separate
means: protocol-based port selection or sideband port selection. Each method is described in detail in the next
two sections.
3.4.1 Protocol Based Port Selection
Protocol-based port selection makes use of a sequence of Serial ATA OOB signals to select the active host
port. The port selection signal is based on a pattern of COMRESET OOB signals transmitted from the host to
the XRS10L210. The port selection signal is composed of a series of COMRESET signals with the timing from
one COMRESET signal to the next as shown in Table 3 and Figure 9. The XRS10L210 selects the port, if
inactive, on the de-assertion of COMRESET after receiving two complete back-to-back sequences with this
defined inter-burst spacing. This can also be identified as two sequences of two COMRESET intervals
comprising a total of five COMRESET bursts with four inter-burst delays. Once a port is designated as active,
reception of additional COMRESET signals is propagated directly to the device, even if the COMRESET
signals constitute a port selection signal.
Note that when protocol based selection mode has been enabled, following the initial hardware reset, a single
COMRESET burst will select the active host port. After this intial host port selection, only COMRESET OOB
observing the protocol timing given below will change the active host.
TABLE 3: PORT SELECTOR SIGNAL INTER-RESET TIMING REQUIREMENTS
NOMINAL
MIN.
MAX
UNITS
COMMENTS
T1
2.0
1.6
2.4
ms
Inter-reset assertion delay for first
event of the selection sequence
T2
8.0
7.6
8.4
ms
Inter-reset assertion delay for second
event of the selection sequence
FIGURE 9. PORT SELECTION SIGNAL - TRANSMITTED COMRESET SIGNALS
3.4.2 Sideband Based Port Selection
The XRS10L210 also features support for a sideband port selection mechanism. This is implemented using a
combination of the MDIO register settings and device pins including PS_SIDEBAND_B and PORTSEL. Refer
to Table 2 for sideband port selection settings.
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