XR81411 Datasheet, PDF (12/15 Pages) Exar Corporation – Universal Quad Clock - High Frequency LVCMOS/LVDS/LVPECL Clock Synthesizer

XR81411
Each of the four Universal Clocks can support up to 4 indi-
vidual output frequency configurations. Once configured,
the two frequency select pins, FSLEL[1:0], will determine
the output frequency from the device. This allows the
XR81411 to support a variety of applications. If the FSEL
pins are left floating, the XR81411 will default (with internal
pull-down resistors on the FSEL inputs) to the Frequency
#1 output.
Table 1: Output Frequency Selection
FSEL[1:0]
00
01
10
11
ZZ
Output Frequency (MHz)
Frequency #1
Frequency #2
Frequency #3
Frequency #4
Frequency #1
Configuration of Universal Clock
For each of the stages - Input, PLL and Output - the final
configuration needs to be programmed by the factory.
Please contact the factory so that samples can be pro-
grammed for your specific application requirements and
sent to you for your validation before ordering. To see a list
of configuration options available for the XR81411 please
send your request to [e-mail].
Output Stages
Each of the XR81411’s output interfaces can select
between LVCMOS, LVPECL or LVDS. If selected for LVC-
MOS operation, the driver can operate up to 200MHz. If
selected for LVPECL or LVDS operation the driver can
operate up to 800MHz.
OUTPUT STAGE
Q
Out’
LVCMOS
LVPECL
Q
LVDS
Control
Figure 16: XR81411 Output Stage
© 2014 Exar Corporation
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Rev 1A